SiC JFET SiC SBD Si Transistor Switching Device
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Solution Overview
Problem
Silicon carbide (SiC) based switching devices face challenges in high voltage applications due to their depletion mode nature, poor gate oxide performance, and short minority carrier lifetime, leading to inefficiencies and increased switching losses in devices like DC-DC converters.
Innovation Solution
A switching device configuration that combines a SiC junction gate field-effect transistor (JFET), a SiC Schottky barrier diode (SBD), and a silicon (Si) transistor, operating as an enhancement mode device to reduce reverse recovery switching loss by distributing current through both the body diode and the SBD, thereby minimizing power loss during state transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SiC JFET is used in high voltage applications, then reliability and switching performance are improved, but the device operates in depletion mode which is unsuitable for high voltage applications
Solution Approach 1:
The patent combines a SiC JFET (depletion mode) with a SiC SBD and a Si enhancement mode device to create a composite switching device that achieves enhancement mode operation while retaining the reliability benefits of SiC JFET technology
Solution Approach 2:
The invention uses a composite structure combining different semiconductor materials (SiC and Si) and device types (JFET, SBD, and enhancement mode device) to achieve properties that individual components cannot provide alone, specifically enabling enhancement mode operation with SiC-based reliability
2Adaptability or versatility
If SiC MOSFET is used to achieve enhancement mode operation, then adaptability for high voltage applications is improved, but gate oxide performance deteriorates
Solution Approach 1:
The patent segments the enhancement mode function from the SiC MOSFET gate oxide by using a separate Si enhancement mode device to provide the enhancement mode operation, thereby avoiding the gate oxide reliability issues while maintaining adaptability
Solution Approach 2:
The Si enhancement mode device acts as an intermediary that provides enhancement mode operation capability without requiring SiC gate oxide, thus mediating between the need for enhancement mode operation and the requirement for reliable gate oxide performance
3Loss of energy
If current is distributed through body diode and SBD to reduce reverse recovery loss, then switching losses are reduced, but device complexity increases
Solution Approach 1:
The patent merges multiple components (SiC JFET, SiC SBD, and Si enhancement mode device) into a single integrated switching device structure, reducing the need for external components and interconnections while achieving current distribution to minimize reverse recovery losses
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration enhances the efficiency of high voltage applications by reducing reverse recovery current and switching losses, improving power efficiency in converters and bridges by distributing current flow effectively between the SiC body diode and the SBD.
Implementation Method 1
a first SiC schottky barrier diode (SBD) connected to a gate and a drain of the first SiC JFET
Data Source
AI summary
An apparatus that includes a first device connected to an inductor. The first device includes a first silicon carbide (SiC) junction gate field-effect transistor (JFET), a first SiC schottky barrier diode (SBD) connected to a gate and a drain of the first SiC JFET, and a first silicon (Si) transistor connected to transmit current to a source of the first SiC JFET. An inductor input terminal is connected to the drain of the first SiC JFET.


