SiC JFET Shielding Member for CGS/CGD Ratio
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Solution Overview
Problem
In semiconductor devices with silicon carbide as a base material, particularly in SiC JFETs, the CGS/CGD ratio (gate-source capacitance to gate-drain capacitance ratio) needs to be increased to enhance performance, as existing designs struggle to optimize this ratio effectively.
Innovation Solution
A semiconductor device structure is implemented with a shielding member disposed between the gate pad and the drain electrode, electrically connected to the source electrode, which reduces the gate-drain capacitance while increasing the gate-source capacitance, thereby enhancing the CGS/CGD ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the gate pad is disposed close to the drain electrode to reduce device area, then the device area is reduced, but the gate-drain capacitance increases which deteriorates the CGS/CGD ratio
Solution Approach 1:
A shielding member is introduced as an intermediary element between the gate pad and the drain electrode. This shielding member is electrically connected to the source electrode and acts as a mediator to reduce the capacitive coupling between the gate pad and drain electrode, thereby reducing the gate-drain capacitance contribution from the contact region while allowing the gate pad to remain close to the drain electrode for area reduction
2Reliability
If the gate pad area is increased to increase gate-source capacitance, then the gate-source capacitance is increased, but the device area increases which is not desirable
Solution Approach 1:
The shielding member is selectively positioned in the contact region to create local electrical field modulation. By placing the shielding member specifically between the gate pad and drain electrode in the contact region, the patent locally modifies the capacitive coupling characteristics without requiring global changes to the device structure, thereby increasing gate-source capacitance contribution from the contact region while maintaining compact device area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively increases the CGS/CGD ratio, reducing switching losses and improving the turn-on affinity of the semiconductor device, such as a JFET, by minimizing the gate-drain capacitance contribution while maximizing the gate-source capacitance.
Implementation Method 1
a shielding member disposed between the gate pad and the drain electrode, the shielding member being electrically connected to the source electrode
Implementation Method 2
increasing the gate-source capacitance, thereby enhancing the CGS/CGD ratio
Data Source
AI summary
A semiconductor device incudes a cell region and a contact region, the cell region including a functional unit including a gate electrode, a source and a drain electrode, and the contact region including a gate pad. The gate electrode, the gate pad and the source electrode are disposed on a first main surface of a semiconductor substrate, and the drain electrode is disposed on a second main surface of the semiconductor substrate, the second main surface being opposite to the first main surface. A shielding member is disposed between the gate pad and the drain electrode, the shielding member being electrically connected to the source electrode.


