SiC JFET Trench Gate Design for Low ON Resistance

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Solution Overview

Problem

The challenge in manufacturing silicon carbide semiconductor devices, such as JFETs, lies in achieving low ON resistance and high channel mobility, which is hindered by variations in trench formation and epitaxial growth, making the process difficult and prone to property variations.

Innovation Solution

A silicon carbide semiconductor device with a junction gate formed by covering the inner surface of trenches, using a gate layer of a second conductivity type, and a filling portion to establish electrical connection, allowing for easier manufacturing and reduced ON resistance through precise trench design and impurity concentration control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If fine processing is performed to form a fine trench and epitaxial growth is performed to accurately fill the fine trench, then channel mobility and ON resistance are improved, but manufacturing difficulty increases significantly

Engineering Contradiction:
Improvetrench formation precisionVSAvoidmanufacturing difficulty
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent changes the fundamental parameter of trench width from fine/narrow to wide/coarse. By increasing the trench width to 1 μm or more, the manufacturing process no longer requires extremely precise fine processing, thereby reducing manufacturing difficulty while still achieving acceptable device performance through alternative control methods

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a preliminary action by forming a gate insulation film on the trench inner surface before filling. This preliminary coating prevents direct contact between the gate electrode and semiconductor substrate, reducing sensitivity to filling variations and enabling easier manufacturing without compromising device characteristics

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If variations in trench formation and epitaxial growth are reduced, then JFET properties become more uniform, but manufacturing complexity increases

Engineering Contradiction:
Improveproperty uniformityVSAvoidprocess complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent changes the trench width parameter to reduce sensitivity to formation variations. By making trenches wide (1 μm or more), the relative impact of manufacturing variations on final device properties is reduced, achieving better uniformity without requiring extremely complex control processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The gate insulation film acts as an intermediary layer between the gate electrode and semiconductor substrate. This intermediate layer decouples the device properties from precise trench filling control, reducing the need for complex manufacturing processes while maintaining property uniformity

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the manufacturing process, reduces ON resistance, and increases breakdown voltage by allowing for precise control over trench formation and electrical connections, enabling efficient production of silicon carbide semiconductor devices with improved performance.

Implementation Method 1

an n− drift layer and a p+ gate layer are epitaxially grown on an n+ 4H—SiC substrate

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

an n− channel region is formed by epitaxial growth to cover the trench structure

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS8872242B2Silicon carbide semiconductor device and method for manufacturing the same
Publication Date: 2014.10.28 MITSUMI ELECTRIC CO LTD
  • US8872242B2 patent drawing
  • US8872242B2 patent drawing
  • US8872242B2 patent drawing

AI summary

A silicon carbide substrate has a first conductivity type. The silicon carbide substrate has a first surface provided with a first electrode and a second surface provided with first trenches arranged to be spaced from one another. A gate layer covers an inner surface of each of the first trenches. The gate layer has a second conductivity type different from the first conductivity type. A filling portion fills each of the first trenches covered with the gate layer. A second electrode is separated from the gate layer and provided on the second surface of the silicon carbide substrate. A gate electrode is electrically insulated from the silicon carbide substrate and electrically connected to the gate layer. Thereby, a silicon carbide semiconductor device capable of being easily manufactured can be provided.