SiC Semiconductor Junction Termination with Field Shielding
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Solution Overview
Problem
Semiconductor devices with silicon carbide substrates face issues with peak electric field intensity at the surface, leading to creeping discharge and reduced withstand voltage, particularly when high reverse voltages are applied, due to inadequate reduction of electric field intensity in JTE regions.
Innovation Solution
A semiconductor device design featuring a silicon carbide substrate with a first conductivity type layer, a second conductivity type region, and strategically formed junction termination regions, where the first conductivity type region with higher impurity concentration is positioned between or adjacent to the junction termination regions to act as an electric field shield, reducing peak electric field intensity at the surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If JTE regions are formed with high impurity concentration reaching the surface, then the JTE structure can be easily formed by ion implantation, but the peak value of electric field intensity reaching the surface cannot be reduced sufficiently, causing creeping discharge and reduced withstand voltage
Solution Approach 1:
The patent applies local quality by creating different impurity concentration zones within the JTE structure. Specifically, it forms a first conductivity type region with higher impurity concentration than the silicon carbide layer, and a second conductivity type region with lower impurity concentration than the first conductivity type region. This spatial variation in impurity concentration allows the structure to simultaneously achieve ease of formation and high withstand voltage by optimizing the electric field distribution locally.
Solution Approach 2:
The patent changes the impurity concentration parameter across different regions of the JTE structure. By establishing a graded impurity concentration profile where the first conductivity type region has higher concentration and the second conductivity type region has lower concentration, the patent modifies the electric field intensity parameter to prevent surface breakdown while maintaining manufacturability through ion implantation.
2Reliability
If the third layer covers the pn junction and JTE region, then the structure provides additional protection, but the third layer does not always have higher impurity concentration than the drift layer, causing perfect depletion and inability to sufficiently reduce peak electric field intensity
Solution Approach 1:
Instead of using a uniform third layer covering the entire pn junction and JTE region, the patent applies local quality by creating specific regions with different impurity concentrations. The first conductivity type region has higher impurity concentration than the silicon carbide layer, while the second conductivity type region has lower impurity concentration than the first conductivity type region. This localized differentiation provides the necessary electric field management without requiring a complex全覆盖 third layer structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses electric field intensity at the surface, preventing creeping discharge and ensuring a stable high withstand voltage in semiconductor devices, even under high reverse voltage conditions.
Implementation Method 1
a first conductivity type region having the first conductivity type and a higher concentration of an impurity having the first conductivity type than that of the silicon carbide layer is formed in at least a vicinal portion of a surface on one of sides in a thickness direction of a portion in which the junction termination regions are bonded to each other or a portion provided between the junction termination regions which are disposed apart from each other
Implementation Method 2
the plurality of junction termination regions are formed in a portion on an outer peripheral end side of the silicon carbide substrate from the second conductivity type region in the vicinal portion of the surface at one of the sides in the thickness direction of the silicon carbide layer and having the second conductivity type
Data Source
AI summary
A semiconductor device having a high withstand voltage in which a stable withstand voltage can be obtained and a method for manufacturing the same. A JTE region having a second conductivity type is formed in a port ion on an outer peripheral end side of an SiC substrate from a second conductivity type SiC region in a vicinal portion of a surface on one of sides in a thickness direction of a first conductivity type SiC epitaxial layer. A first conductivity type SiC region having a higher concentration of an impurity having the first conductivity type than that of the SiC epitaxial layer is formed in at least a vicinal portion of a surface on one of sides in a thickness direction of a portion in which the JTE regions are bonded to each other.