SiC Semiconductor Lead Frame Vertical Upright Design
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Solution Overview
Problem
The existing semiconductor devices face challenges in increasing current capacity due to limitations in the thickness and width of lead frames, which restricts downsizing and increases the size and number of components, particularly in high current applications with SiC semiconductor chips.
Innovation Solution
A semiconductor device design that includes a conductive substrate with semiconductor chips bonded to it, control terminals outside the chips connected via leads, and lead frames with an upright part embedded in a case, allowing for increased width without expanding the mounting surface area, thereby enhancing current capacity and reducing parasitic inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the thickness of lead frames is increased to accommodate higher current capacity, then the current capacity is improved, but the stress applied from the lead frames increases and the thickness can be increased only to a limited extent due to bending requirements
Solution Approach 1:
The lead frame transitions from a planar configuration to a three-dimensional structure with upright parts extending vertically from the bonded part. This dimensional change allows the lead frame to achieve greater current capacity through increased effective cross-sectional area without proportionally increasing the stress on the bonded interface, as the current path is distributed through the vertical extension rather than requiring excessive thickness in the bonded plane.
2Quantity of substance
If the lateral width of lead frames is extended to achieve large current capacity, then the current capacity is improved, but the device size increases
Solution Approach 1:
Instead of extending the lead frame width in the lateral plane, the invention extends the lead frame vertically by forming upright parts that stand perpendicular to the bonded part. This utilizes the vertical dimension (height) rather than the lateral dimension (width), thereby achieving increased current capacity through the upright extension while maintaining a compact lateral footprint and preventing device size increase.
3Quantity of substance
If multiple semiconductor chips are connected in parallel to achieve large current capacity, then the current capacity is improved, but the number of control terminals increases and sufficient space is not available for lead frames to extend outside control terminals
Solution Approach 1:
The invention merges the lead frame structures of multiple semiconductor chips by forming a common upright part that extends vertically from the bonded parts of multiple chips. This consolidation allows multiple chips to share a unified lead frame structure, enabling them to draw electric current collectively through a single integrated path rather than requiring separate lead frames for each chip, thereby reducing overall device complexity.
4Area of stationary object
If the widths of control terminals and lead frames are reduced to downsize semiconductor devices, then the device size is reduced, but the current capacity is limited
Solution Approach 1:
The invention resolves the trade-off between device size and current capacity by transitioning the lead frame from a two-dimensional planar structure to a three-dimensional structure with vertical upright parts. This allows the lead frame to achieve greater effective cross-sectional area for current conduction through vertical extension rather than lateral expansion, thereby maintaining compact device dimensions while achieving high current capacity through the upright configuration.
Data Source
AI summary
A semiconductor chip (2a) is bonded to an upper surface of the conductive substrate (1a). A control terminal (11a) is disposed outside the semiconductor chip (2a) and connected to a control electrode of the semiconductor chip (2a) via a lead (12a). A case (10) surrounds the semiconductor chip (2a). A sealing material (13) seals the semiconductor chip (2a). The lead frame (4) includes a bonded part (4a) joined to the semiconductor chip (2a), and an upright part (4b) embedded in the case (10), extending from the bonded part (4a) to an outer side of the control terminal (11a), and standing upright vertically relative to an upper surface of the semiconductor chip (2a).