SiC Epitaxial Layer Transfer Using MELO Micro-Voids
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Solution Overview
Problem
The high cost of wide bandgap semiconductor devices is predominantly due to the expensive substrate, particularly for SiC substrates, where current methods for increasing substrate size are limited by yield losses and the inability to eliminate complex fabrication steps, resulting in thin substrates that may not be suitable for meaningful semiconductor device production.
Innovation Solution
A method involving coating a SiC substrate with a hard mask material, performing lithography to define patterned openings, etching to form reentrant trenches, and using Merged Epitaxial Lateral Overgrowth (MELO) to create micro voids, allowing for the growth of a uniform single crystal layer and subsequent epitaxial layer formation, enabling the extraction of individual dies from the substrate with minimal yield loss and substrate reuse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional substrate fabrication methods (ingot growth, wire sawing, grinding, polishing) are used, then substrate quality is maintained, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent changes the fundamental parameter of substrate fabrication from mechanical processing (wire sawing, grinding, polishing) to a chemical deposition process (epitaxial growth). By growing the substrate as a thin film on a carrier wafer, the complex mechanical fabrication steps are replaced with a single epitaxial growth step, reducing manufacturing complexity while maintaining substrate quality
Solution Approach 2:
The patent replaces the mechanical substrate fabrication system (ingot growth, wire sawing, grinding, polishing) with a chemical vapor deposition system (epitaxial growth). This substitution eliminates the need for mechanical cutting and polishing equipment, simplifying the manufacturing process while achieving equivalent or superior substrate quality
2Loss of substance
If substrate size is increased to reduce cost per device, then material utilization improves, but yield losses increase due to defects
Solution Approach 1:
The patent segments the substrate into multiple smaller epitaxial grains that are grown independently on the carrier wafer. These grains can be individually selected and combined to form a larger effective substrate area, allowing high material utilization while maintaining low defect densities by excluding defective grains from the final device area
Solution Approach 2:
The patent changes the substrate structure from a single large crystal to a polycrystalline or multi-grain structure grown epitaxially. This parameter change allows the substrate to be composed of many small, high-quality crystalline regions rather than one large crystal, enabling both large effective area and low defect density
3Loss of substance
If thin substrates are used to reduce material cost, then substrate contribution to device cost decreases, but substrate mechanical strength and suitability for device fabrication are compromised
Solution Approach 1:
The patent embeds the thin active substrate within a larger carrier wafer structure during fabrication. The carrier wafer provides mechanical strength and handling support, while the thin epitaxial substrate performs the active device function. This nested structure allows thin substrates to be used without compromising mechanical strength during manufacturing
Solution Approach 2:
The patent introduces a carrier wafer as an intermediary between the thin substrate and the handling/fabrication processes. The carrier wafer serves as a mechanical mediator that provides the necessary strength and stability during device fabrication, while the thin substrate remains the active functional element
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the substrate contribution to the final device cost while maintaining low defect densities, enabling the production of high-quality SiC devices with improved thermal dissipation and reliability, and allows for the reuse of substrates, potentially lowering overall production costs.
Implementation Method 1
coating the substrate with a hard mask material
Implementation Method 2
performing lithography to define patterned openings
Implementation Method 3
etching the substrate to form patterned trenches
Implementation Method 4
performing a buffer epitaxy on the substrate to form a uniform single crystal layer over the patterned trenches
Implementation Method 5
performing another epitaxy on the substrate using a fast epitaxial growth process to provide an active device epitaxial layer
Data Source
AI summary
A method for manufacturing a wide band gap semiconductor device using a substrate of SiC wafer is disclosed. The method includes coating the substrate with a hard mask material, performing lithography to define patterned openings in the hard mask material of the substrate, etching the substrate to form patterned trenches from the defined patterned openings, removing the hard mask using a chemical process from the substrate, cleaning the substrate with the patterned trenches, performing epitaxy on the substrate to form a uniform single crystal layer over the patterned trenches to create a plurality of micro voids, kiss polishing the substrate, performing another epitaxy on the substrate using a fast epitaxial growth process to provide an active device epitaxial layer suitable to fabricate SiC devices, and after fabrication of the SiC devices, severing the plurality of micro voids to extract the SiC devices from the substrate of the SiC wafer.