SiC Epitaxial Merge Layer for Low-Cost Wide Bandgap Manufacturing
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Solution Overview
Problem
The high cost of wide bandgap semiconductor devices is predominantly due to the expensive substrate materials, particularly 4H-Silicon Carbide (SiC) substrates, which contribute over half of the final device cost. Current methods to reduce substrate costs, such as increasing substrate size or kerfless wafer extraction, face challenges like yield losses and limitations in wafer thickness.
Innovation Solution
A method involving coating a SiC substrate with a hard mask material, performing lithography to define patterned openings, etching the substrate to form patterned trenches, and then using epitaxial growth to create a uniform single crystal layer with micro voids. This process allows for the partial fabrication of devices on a thin epitaxially grown substrate, which can be exfoliated from the nano-patterned SiC substrate, enabling the reuse of the substrate and reducing material costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional substrate fabrication processes are used (ingot growth, cropping, wire sawing, grinding, polishing), then substrate quality is maintained, but manufacturing cost and process complexity increase significantly
Solution Approach 1:
The patent extracts the essential function of substrate fabrication by directly growing high-quality epitaxial layers on commercially available SiC substrates, eliminating the need for complex ingot growth, cropping, wire sawing, grinding, and polishing processes. This extraction of the critical fabrication steps reduces process complexity while maintaining substrate quality through the epitaxial growth method.
Solution Approach 2:
The patent employs commercially available, relatively inexpensive SiC substrates that can be disposed of after a single use, replacing the need for expensive, repeatedly processed ingots. Each substrate is used once to grow the required epitaxial layers, then discarded, simplifying the overall manufacturing process while maintaining product quality.
2Quantity of substance
If substrate size is increased to 200 mm to reduce cost per device, then material utilization improves, but commercialization is delayed several years due to development requirements
Solution Approach 1:
The patent performs preliminary actions by using commercially available SiC substrates of various sizes (including smaller sizes that are already on the market) to grow high-quality epitaxial layers. This allows immediate production and commercialization without waiting for 200 mm substrate development, while still achieving cost reduction through optimized material utilization.
3Loss of substance
If kerfless wafer extraction methods are used (femtosecond laser, SmartCut), then substrate material is saved, but yield losses occur during the cleaving process
Solution Approach 1:
The patent extracts only the necessary epitaxial layers grown on the substrate without requiring kerfless wafer extraction or cleaving processes. The epitaxial layers are directly grown to the required thickness and quality, eliminating the need for subsequent extraction steps that cause yield losses.
4Loss of substance
If thin epitaxial layers are grown to reduce substrate usage, then material cost decreases, but defect density increases and reliability decreases
Solution Approach 1:
The patent changes the growth parameters of the epitaxial process to optimize both thickness and quality. By carefully controlling temperature, pressure, gas flow, and precursor ratios during epitaxial growth, the method produces thin layers with low defect density, achieving both cost reduction and high reliability.
Solution Approach 2:
The patent applies local quality by creating different regions in the epitaxial layer with different properties - the bulk material provides mechanical strength and thermal management, while the optimized epitaxial regions provide low-defect semiconductor performance. This localized optimization allows thin layers to achieve high reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces the substrate contribution to the final die cost while maintaining low defect densities, enabling the production of high-quality wide bandgap semiconductor devices with improved yield and performance. The ability to reuse the SiC substrate further reduces costs and enhances efficiency.
Implementation Method 1
coating the substrate with a hard mask material
Implementation Method 2
performing lithography to define patterned openings
Implementation Method 3
etching the substrate to form patterned trenches
Implementation Method 4
performing a buffer epitaxy on the substrate to form a uniform single crystal layer over the patterned trenches
Implementation Method 5
performing another epitaxy on the substrate using a fast epitaxial growth process to provide an active device epitaxial layer
Data Source
AI summary
A merge layer of silicon carbide (SiC) or gallium nitride (GaN) is formed overlying a substrate. The substrate comprises SiC or GaN. A surface of the merge layer comprises an epitaxial layer formed by epitaxial lateral overgrowth. One or more epitaxial layers are formed overlying the merge layer. The surface of the merge layer is configured to reduce a propagation of defects from the substrate to the one or more epitaxial layers. A plurality of semiconductor devices are formed in or on the oner or more epitaxial layers.