SiC Mesa Current Shifting Structure for Breakdown Voltage Stability
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Solution Overview
Problem
High voltage silicon carbide (SiC) semiconductor devices face issues with electric field crowding at mesa corners, leading to reduced breakdown voltage and current gain degradation due to material defects and surface recombination, especially in bipolar junction transistors (BJTs).
Innovation Solution
A semiconductor device structure is developed with a current shifting region of a second conductivity type adjacent to the mesa and buffer layer, which redirects current crowding away from the mesa corners, and includes a semiconductor step with a thickness less than the mesa, and a control contact region for electrical coupling, formed using epitaxial deposition and ion implantation techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a mesa structure is used in high voltage SiC devices, then the device can handle high voltages and currents, but electric field crowding occurs at the mesa corner leading to reduced breakdown voltage
Solution Approach 1:
A buffer layer with intermediate doping concentration (1×10^15 to 1×10^16 atoms/cm³) is introduced between the drift layer and the substrate. This buffer layer acts as an intermediary that modifies the electric field distribution, preventing excessive field crowding at the mesa corner while maintaining the high voltage blocking capability of the device structure.
Solution Approach 2:
The buffer layer is specifically positioned at the mesa corner region where electric field crowding occurs most severely. By localizing the low-doping buffer region at this critical location, the electric field is redistributed away from the corner, improving breakdown voltage without compromising the overall device performance.
2Ease of manufacture
If over-etching of the mesa is performed, then manufacturing flexibility is improved, but electric field crowding at the mesa corner is exacerbated
Solution Approach 1:
The buffer layer is introduced beforehand to compensate for the harmful effects of over-etching. Even when the mesa is over-etched and the drift layer is exposed at the corner, the buffer layer remains in place to provide electric field control and prevent excessive field crowding, thus cushioning against the detrimental effects of manufacturing variability.
3Ease of manufacture
If material defects and surface recombination are present at the emitter sidewall and base surface, then device fabrication is simplified, but current gain degradation occurs in BJTs
Solution Approach 1:
The invention extracts or removes the problematic region by positioning the buffer layer to create a transition zone that separates the high-quality active region from the defect-prone surface region. This extraction of the defect-influenced area prevents surface recombination and material defects from degrading the current gain in the active transistor region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure effectively reduces current crowding at the mesa corners, minimizing defects and enhancing the breakdown voltage and current gain stability of SiC power devices by aligning crystalline structures with the substrate and using low-angle off-cut SiC substrates to reduce basal plane dislocations.
Implementation Method 1
A current shifting region having a second conductivity type is provided in the buffer layer adjacent a corner between the mesa and the buffer layer
Implementation Method 2
formed using epitaxial deposition and ion implantation techniques
Data Source
Figure 1~2A
Figure 2B~2C
Figure 3A~3B
AI summary
A semiconductor device includes a semiconductor buffer layer (209) having a first conductivity type and a semiconductor mesa (203) having the first conductivity type on a surface of the buffer layer. In addition, a current shifting region (211) having a second conductivity type is provided adjacent a corner between the semiconductor mesa and the semiconductor buffer layer, and the first and second conductivity types are different conductivity types. Related methods are also discussed.