SiC MOS Gate Insulator Structure for Low Interface State Density
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Solution Overview
Problem
The SiC-MOS structure experiences high-density interface states at the SiO2/SiC interface, which increase with the thickness of the gate insulating film, leading to reduced channel mobility and increased leakage current.
Innovation Solution
Employ a gate insulating film with an AlON/SiO2 multilayer structure, formed by annealing a silicon carbide substrate and silicon oxide film in hydrogen-containing gas to hydrogen-terminate the interface, followed by the deposition of an aluminum oxynitride film to maintain the improved interface state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the thickness of the gate insulating film is increased, then the dielectric breakdown resistance is improved, but the interface state density increases
Solution Approach 1:
The gate insulating film is divided into multiple layers: a first gate insulating film layer (SiO2) in contact with the SiC substrate, and a second gate insulating film layer (AlON) formed on top. This segmentation allows the bottom layer to provide good interface characteristics with low state density, while the top layer provides high dielectric strength, resolving the contradiction between breakdown resistance and interface quality.
Solution Approach 2:
The patent uses a composite gate insulating film structure combining SiO2 and AlON materials. The SiO2 layer provides excellent interface properties with the SiC substrate, while the AlON layer contributes high dielectric constant and breakdown strength. This composite approach enables simultaneous achievement of low interface state density and high dielectric breakdown resistance.
2Strength
If the thickness of the gate insulating film is increased, then the dielectric breakdown resistance is improved, but the channel mobility is reduced
Solution Approach 1:
By segmenting the gate insulating film into two functional layers, the patent achieves high breakdown resistance through the thick AlON layer while maintaining high channel mobility through the thin SiO2 layer at the interface, eliminating the need for a single thick film that would degrade mobility.
Solution Approach 2:
The patent applies local quality by having different layers serve different functions: the SiO2 layer optimized for interface quality and carrier mobility near the channel, while the AlON layer optimized for dielectric strength and breakdown resistance. This localized optimization resolves the contradiction between mobility and breakdown resistance.
3Strength
If the thickness of the gate insulating film is increased, then the dielectric breakdown resistance is improved, but the leakage current increases
Solution Approach 1:
The segmented structure allows the thin SiO2 layer to maintain low leakage current through excellent interface properties, while the thick AlON layer provides the necessary breakdown resistance. The total effective thickness for breakdown is high, but the critical interface region remains thin, reducing leakage.
Solution Approach 2:
The composite SiO2-AlON structure combines materials with complementary properties: SiO2 provides low leakage current through its excellent interface with SiC, while AlON provides high dielectric strength. This composite approach achieves high breakdown resistance without the leakage penalty of a single thick film.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The AlON/SiO2 multilayer structure reduces interface state density, enhancing channel mobility and reducing leakage current while maintaining high electric characteristics, thus improving the reliability and operating speed of the semiconductor device.
Implementation Method 1
annealing the silicon carbide substrate and the silicon oxide film in gas containing hydrogen
Implementation Method 2
forming an aluminum oxynitride (AlON) film on the silicon oxide film
Data Source
AI summary
A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.