SiC Trench MOSFET Base Layer Segmentation for Lower ON Resistance
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Solution Overview
Problem
Conventional silicon carbide trench-type MOSFETs experience bipolar degradation due to channel implantation, leading to increased ON resistance and forward voltage, as electron current does not easily penetrate the p-type base layer, resulting in reduced electron current ratio and increased hole accumulation in the drift layer.
Innovation Solution
The silicon carbide semiconductor device features channel implantation only in shallow regions near the MOS channels, with Schottky metal forming junctions on portions of the p-type base layer where channel implantation is not performed, facilitating electron current penetration and reducing hole injection into the drift layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If channel implantation is performed in the p-type base layer to increase threshold voltage, then reliability against erroneous turning ON improves, but ON resistance increases and electron current penetration deteriorates
Solution Approach 1:
The patent divides the p-type base layer into two distinct regions: a first region with higher impurity concentration (1×10^16 to 1×10^17 atoms/cm³) that provides threshold voltage stability, and a second region with lower impurity concentration (1×10^15 to 1×10^16 atoms/cm³) that enables electron current penetration. This spatial segmentation resolves the contradiction by assigning different functional roles to different parts of the base layer.
Solution Approach 2:
The patent applies local quality by creating regions with different impurity concentrations within the p-type base layer. The first region has locally higher impurity concentration to increase threshold voltage and prevent erroneous turning ON, while the second region has locally lower impurity concentration to reduce ON resistance and facilitate electron current flow. This local differentiation allows simultaneous optimization of both reliability and ON resistance.
2Reliability
If channel implantation is performed to increase threshold voltage, then reliability improves, but forward voltage increases due to hole accumulation in drift layer
Solution Approach 1:
The patent segments the p-type base layer into a first region with higher impurity concentration for threshold voltage control and a second region with lower impurity concentration that reduces hole accumulation in the drift layer. This segmentation prevents the simultaneous increase of threshold voltage and forward voltage, resolving the contradiction between reliability and energy loss.
Solution Approach 2:
By creating local regions with different impurity concentrations, the patent achieves threshold voltage control in the first region while maintaining low forward voltage through the second region. The local quality differentiation ensures that hole accumulation is minimized in specific areas, reducing overall energy loss.
3Ease of manufacture
If uniform impurity concentration is used in p-type base layer, then manufacturing simplicity is maintained, but electron current penetration and breakdown voltage performance deteriorate
Solution Approach 1:
The patent divides the p-type base layer into two regions with different impurity concentrations, which requires additional manufacturing steps such as selective ion implantation or epitaxial growth. While this reduces manufacturing simplicity, it significantly improves electron current penetration and breakdown voltage performance by creating optimal electrical characteristics in each region.
Solution Approach 2:
The patent applies local quality by creating regions with different impurity concentrations within the p-type base layer. The first region has locally higher impurity concentration to provide stable threshold voltage, while the second region has locally lower impurity concentration to enable electron current penetration and maintain high breakdown voltage. This local differentiation resolves the contradiction between manufacturing simplicity and device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electron current ratio, suppresses bipolar degradation, and maintains high breakdown voltage by allowing electron current to easily penetrate the p-type base layer, reducing hole accumulation and leak current during reverse bias.
Implementation Method 1
Schottky metal forming junctions on portions of the p-type base layer where channel implantation is not performed, facilitating electron current penetration and reducing hole injection into the drift layer
Implementation Method 2
to adjust a threshold voltage (Vth), ion implantation (hereinafter, channel implantation) is performed in a portion of the p-type base layer 106 forming a channel
Data Source
AI summary
A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, second semiconductor regions of the second conductivity type, third semiconductor regions of the second conductivity type, provided in the second semiconductor layer at positions facing the first semiconductor regions in a depth direction and having an impurity concentration higher than an impurity concentration of the second semiconductor layer, trenches, gate insulating films, gate electrodes, a first electrode, a second electrode, and third electrodes. The third electrodes form Schottky junctions with the second semiconductor layer and are provided on the surface of portions of the second semiconductor layer free of the third semiconductor regions.