SiC MOSFET Structure for Lower Gate-Drain Capacitance
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing gate-drain capacitance, which limits their operation speed due to the large facing area between the gate electrode and the drift layer, leading to increased on-resistance and potential defects in silicon carbide materials.
Innovation Solution
Incorporating a p-type layer between the drift layer and the Schottky barrier diode region, reducing the facing area and enhancing the arrangement density of gate electrodes, thereby reducing gate-drain capacitance and on-resistance while maintaining a balance between these parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the facing area between the gate electrode and the drift layer is reduced to decrease gate-drain capacitance, then the operation speed is improved, but the on-resistance increases
Solution Approach 1:
A p-type layer is introduced as an intermediary between the n-type drift layer and the Schottky barrier diode region. This intermediate layer enables the reduction of the facing area between the gate electrode and drift layer (decreasing gate-drain capacitance) while maintaining adequate current conduction paths, thus improving operation speed without excessively increasing on-resistance
Solution Approach 2:
The p-type layer is strategically positioned only in specific regions where it can reduce the gate-drain capacitance effect, while the overall structure maintains areas for current flow. This localized modification allows selective optimization of capacitance reduction without compromising the entire device's conductivity
2Reliability
If the p-type layer is arranged within the Schottky barrier diode region to suppress bipolar current, then the short-circuit withstand capacity is improved, but the device complexity increases
Solution Approach 1:
The p-type layer serves multiple functions simultaneously: it suppresses bipolar current to improve short-circuit withstand capacity, and it also contributes to reducing gate-drain capacitance by modifying the electric field distribution. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves a balance between reduced gate-drain capacitance and on-resistance, suppressing bipolar current and electrical resistance, and improving short-circuit withstand capacity by arranging the p-type layer strategically within the Schottky barrier diode region.
Implementation Method 1
an SBD (Schottky Barrier Diode) may be embedded in a MOSFET
Implementation Method 2
It is desirable to reduce the gate-drain capacitance in such a semiconductor device to increase the operation speed
Data Source
AI summary
A semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode and being of a first conductivity type, second semiconductor layers located on a portion of the first semiconductor layer and being of a second conductivity type, a third semiconductor layer located on a portion of the second semiconductor layer and being of the first conductivity type, a fourth semiconductor layer located in a portion of the first semiconductor layer between the second semiconductor layers and being of the second conductivity type, a second electrode facing the second semiconductor layer via an insulating film, and a third electrode connected to the second and third semiconductor layers. The first, second, third, and fourth semiconductor layers include silicon and carbon.