SiC MOSFET Trapping Layer for Interface Charge Compensation
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Solution Overview
Problem
The presence of fixed positive charges at the oxide interface in MOSFET devices with silicon carbide substrates leads to instability and high junction leakage currents due to defects and interface states, affecting switching performance and operating characteristics.
Innovation Solution
Incorporating a trapping layer of insulating material with electron traps, such as Al2O3 or SiO2, to balance the positive interface charge by generating negative charges, which compensates for ionized donors in the semiconductor body, thereby optimizing the device's threshold voltage and reducing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a trapping layer of insulating material with electron traps is incorporated to balance positive interface charge, then device stability and switching performance are improved, but device structure and manufacturing process become more complex
Solution Approach 1:
An insulating layer with electron traps (such as silicon nitride or silicon oxynitride) is introduced as an intermediary between the oxide layer and the 3C-SiC substrate. This trapping layer acts as a mediator that captures positive interface charges, preventing them from affecting the MOSFET operation. The trapped charges stabilize the device by compensating for the harmful interface states without requiring changes to the fundamental device structure.
2Object-generated harmful factors
If a trapping layer of insulating material with electron traps is incorporated to balance positive interface charge, then junction leakage current is reduced, but manufacturing process steps increase
Solution Approach 1:
The insulating layer with electron traps is deposited on the 3C-SiC substrate before subsequent processing steps. This preliminary action prepares the surface by creating a charge-trapping capability that will prevent future leakage issues. The layer is formed using standard semiconductor deposition techniques, and its presence enables better control of interface charges throughout the remaining manufacturing process.
Solution Approach 2:
The manufacturing process utilizes parameter changes in the deposition conditions to control the electron trap density in the insulating layer. By adjusting deposition temperature, pressure, and gas flow ratios during the formation of the insulating layer, the trap density is optimized to effectively capture interface charges while maintaining compatibility with existing manufacturing workflows.
3Reliability
If positive charges at the oxide interface are present, then MOSFET operating characteristics are shifted and inversion layers are generated, but adding compensation mechanisms increases device complexity
Solution Approach 1:
The invention converts the harmful effect of positive interface charges into a beneficial effect by introducing an insulating layer with electron traps. These traps deliberately capture positive charges, transforming the uncontrolled harmful interface states into a controlled charge compensation mechanism. The trapped charges create a stabilizing effect that improves threshold voltage control and eliminates unwanted inversion layers, turning a device defect into a functional advantage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively stabilizes the MOSFET device by reducing junction leakage and improving switching performance by balancing interface charges, enhancing the overall reliability and efficiency of silicon carbide-based electronic devices.
Implementation Method 1
a trapping layer, of insulating material, extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge
Data Source
AI summary
An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.
