SiC Power MOSFET Current-Spreading Layout for Low On-Resistance
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Solution Overview
Problem
Existing SiC-based power MOSFETs face challenges in achieving both low specific on-resistance and high reliability due to the limitations of gate oxides and doping concentration in JFET regions, which affect channel resistance and drift region resistance.
Innovation Solution
A power semiconductor device design featuring a semiconductor substrate with a drift layer, a first lateral current spreading layer, and a device layer, including active doped regions and a second lateral current spreading layer with specific doping and thickness configurations to optimize current distribution and reduce electric field influence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the doping concentration of JFET regions is increased to reduce JFET resistance, then the specific on-resistance decreases, but the reliability deteriorates due to poor gate oxide quality and increased stress on the device
Solution Approach 1:
The drift layer is segmented into multiple regions with different doping concentrations: a first drift region with higher doping concentration near the JFET region to reduce resistance, and a second drift region with lower doping concentration near the gate oxide to improve reliability. This segmentation allows each region to be optimized for its specific function without compromising the other.
Solution Approach 2:
Different regions of the drift layer are assigned different doping concentrations tailored to their specific functional requirements. The first drift region has higher doping concentration to reduce resistance in the critical current path, while the second drift region has lower doping concentration to minimize stress on the gate oxide and improve overall device reliability.
2Loss of energy
If the doping concentration of the drift layer is increased to reduce drift region resistance, then the specific on-resistance decreases, but the breakdown voltage deteriorates
Solution Approach 1:
The drift layer is divided into two distinct regions with different doping concentrations. The first drift region has higher doping concentration to reduce resistance, while the second drift region has lower doping concentration to maintain high breakdown voltage. This segmentation resolves the contradiction by allowing each region to be optimized independently.
Solution Approach 2:
The patent applies local quality by assigning different doping concentrations to different spatial regions of the drift layer. The first drift region near the JFET has higher doping to reduce resistance, while the second drift region near the gate oxide has lower doping to preserve breakdown voltage, ensuring each area has the properties it needs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves forward conduction characteristics, reduces specific on-resistance, and enhances reliability by minimizing the influence on the electric field, thereby suppressing breakdown voltage degradation.
Implementation Method 1
the first lateral current spreading layer has a same conductivity type as the drift layer and a higher doping concentration than the drift layer
Implementation Method 2
a first lateral current spreading layer disposed on a surface of the drift layer away from the semiconductor substrate layer
Implementation Method 3
the device layer disposed on a surface of the first lateral current spreading layer away from the drift layer. Herein, the device layer may include a plurality of active doped regions spaced laterally
Data Source
AI summary
A power semiconductor device and a preparation method therefor. The power semiconductor device comprises: a first lateral current spreading layer (120); and a device layer (130). The device layer (130) comprises: a plurality of active doped regions (1302); and second lateral current spreading layers (1301), without overlapping projections from the second lateral current spreading layer (1301) and the device layer between adjacent active doped regions (1302) in a direction perpendicular to a surface of the semiconductor substrate layer (100), and the doping concentration of the second lateral current spreading layers (1301) is greater than the doping concentration of the drift layer (110). The power semiconductor device takes both low specific on-resistance and high reliability into consideration.