SiC Trench MOSFET Well Layout for Gate Oxide Breakdown Resistance
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Solution Overview
Problem
SiC Trench MOSFETs face issues with rapid gate oxide breakdown and reduced breakdown voltage due to electric field concentration at the trench corner, and high-energy ion implantation causes lateral straggling and cell pitch reduction.
Innovation Solution
The power semiconductor device employs a structure with a first and second epi layer of a first conductivity type, and first and second wells of a second conductivity type, formed without high-energy ion implantation, which allows the second well to be disposed deeper than the trench, dispersing the electric field and preventing gate oxide breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If high-energy ion implantation is used to form a deep p-type well to prevent electric field concentration, then breakdown voltage is improved, but lateral straggling occurs causing cell pitch reduction
Solution Approach 1:
The patent divides the ion implantation process into two separate steps: a first ion implantation to form an initial p-type well, and a second ion implantation to deepen the well. This segmentation allows each implantation to use lower energy, preventing lateral straggling while achieving the desired well depth for electric field management and high breakdown voltage.
Solution Approach 2:
The first ion implantation creates a preliminary p-type well structure that serves as a foundation for the second implantation. This preliminary action enables the second implantation to extend the well deeper without requiring excessive energy, thereby avoiding lateral straggling while achieving the target well depth for optimal breakdown voltage.
2Reliability
If the p-type well is formed deeper than the gate trench to disperse electric field, then gate oxide breakdown is prevented, but ion implantation energy exceeds general process levels
Solution Approach 1:
The patent segments the well formation into two controlled ion implantation steps, each using energy levels within general process capabilities. The first implantation establishes a preliminary well, and the second extends it to the required depth, achieving deep well formation for electric field dispersion without exceeding standard process energy limits.
Solution Approach 2:
The first ion implantation performs a preliminary action of creating an initial p-type well structure. This preliminary well serves as a template that guides the second implantation to achieve the final desired depth, making the overall process manufacturable with standard equipment while still achieving sufficient well depth for gate oxide protection.
3Strength
If high-energy ion implantation is used to form deep p-type well, then electric field concentration at trench corner is reduced, but severe ion implantation outside target region occurs
Solution Approach 1:
The patent divides the implantation into two separate processes, each using lower energy that confines ion penetration to the target region. The first implantation forms an initial well within the target area, and the second implantation extends it deeper without significant lateral spread, preventing ion implantation outside the target region while still achieving deep well formation for proper electric field distribution.
Solution Approach 2:
The first ion implantation performs a preliminary action of creating a confined p-type well within the target region using low energy. This preliminary structure then guides the second implantation to extend the well deeper without lateral spread, ensuring that both implantations remain confined to the target region while achieving the necessary well depth for electric field management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents electric field concentration at the trench corner, avoids cell pitch reduction due to lateral straggling, and enhances breakdown voltage and current density by optimizing the doping concentrations and well positions.
Implementation Method 1
there is a problem in that the ion implantation energy exceeds the level of a general process
Implementation Method 2
a first epi layer 112a of a first conductivity type disposed on the substrate 111, a second epi layer 112b of a first conductivity type disposed on the layer 112a
Data Source
AI summary
A power semiconductor device includes a substrate, a first epi layer of a first conductivity type disposed on the substrate, a second epi layer of a first conductivity type disposed on the first epi layer, a first well of a second conductivity type partially disposed in the first epi layer, a second well of a second conductivity type disposed on the second epi layer, an ion implantation region and a source region of the second conductivity type disposed in the second well, a source electrode in the source region, a gate insulating layer in a trench region where a portion of the ion implantation region and the second epi layer is removed, a trench gate disposed on the gate insulating layer, an interlayer insulating layer disposed on the trench gate and a gate electrode electrically connected to the trench gate.