SiC MOSFET Diode Integration Eliminates Parasitic Inductance
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Solution Overview
Problem
Conventional three-phase semiconductor modules using silicon IGBTs and silicon carbide MOSFETs require multiple wires for connection, leading to parasitic capacitance and inductance, which reduces switching speed and increases power loss.
Innovation Solution
A silicon carbide semiconductor device integrating a MOSFET region and a diode region on a shared substrate, eliminating the need for connecting wires by forming trenches and regions such as n+ and p type layers, gate and source insulating layers, and electrodes, allowing for simultaneous MOSFET and diode operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If silicon IGBTs and silicon carbide MOSFETs are connected to separate diodes with multiple wires, then the module can perform both MOSFET and diode functions, but parasitic capacitance and inductance increase, reducing switching speed
Solution Approach 1:
The patent combines the MOSFET and diode into a single integrated device structure. The diode cathode and MOSFET source share a common n+ type layer, eliminating the need for separate wire connections. This merging of functions into one device reduces the number of external connections and minimizes parasitic elements while maintaining both MOSFET and diode operational capabilities.
Solution Approach 2:
The integrated device structure serves multiple functions: it operates as a MOSFET when the gate is controlled, and as a diode when the gate is unbiased or reverse-biased. The shared n+ type layer and trench isolation structure enable both functionalities within a single device, eliminating the need for separate diode components and their associated wiring.
2Adaptability or versatility
If multiple wires are used for connecting MOSFETs and diodes, then separate functions can be implemented, but parasitic inductance increases, increasing power loss
Solution Approach 1:
The patent merges the MOSFET and diode into a single integrated device, eliminating multiple wire connections. The shared n+ type layer and common trench structure reduce the number of current paths and associated parasitic inductances, thereby reducing power loss during switching operations while maintaining both functions.
Solution Approach 2:
The patent extracts and eliminates the unnecessary wire connections between separate MOSFET and diode components. By integrating the diode function into the MOSFET structure through shared regions, the harmful parasitic inductance of external wires is removed, reducing energy loss.
3Adaptability or versatility
If separate diodes are connected with multiple wires, then independent diode function is achieved, but the area required for the module increases
Solution Approach 1:
The patent merges the diode and MOSFET into a single integrated device, sharing the n+ type layer and trench isolation structure. This consolidation eliminates the need for separate diode components and their associated wiring space, significantly reducing the overall module area while maintaining independent diode functionality through the shared structure.
Solution Approach 2:
The integrated device structure provides both MOSFET and diode functions within a single device footprint. The shared n+ type layer and trench isolation enable dual functionality without requiring separate dedicated areas for each component, thereby reducing the total module area.
Data Source
AI summary
A semiconductor device includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench formed in the n− type layer and separated from each other; an n+ type region disposed between a side surface of the first trench and the side surface of the second trench and disposed on the n− type layer; a gate insulating layer disposed inside the first trench; a source insulating layer disposed inside the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer, the n+ type region, and the source insulating layer; and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate.