SiC Power MOSFET Doping Layout for Lower Resistance
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Solution Overview
Problem
Existing silicon carbide (SiC) transistors face challenges with low electron mobility and high resistance, which are unsuitable for certain applications.
Innovation Solution
A power MOSFET design incorporating a silicon carbide substrate with varying dopant concentrations in different layers, including a silicon carbide drift layer, well implant layer, and source implant layers, along with an insulating layer and gate structure, to enhance carrier mobility and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon carbide is used as substrate and drift layer, then device reliability and power handling capability are improved, but electron mobility remains low and resistance is high
Solution Approach 1:
The patent applies local quality by creating distinct regions with different doping concentrations within the silicon carbide structure. The body region has higher doping concentration than the drift region, optimizing each zone for its specific function: the body provides carrier injection while the drift region maintains low loss, thereby reducing overall resistance while preserving reliability
Solution Approach 2:
The patent changes the doping concentration parameter across different regions of the silicon carbide transistor. By varying the dopant concentration from the body region to the drift region, the patent optimizes electrical characteristics to reduce resistance while maintaining the inherent reliability advantages of silicon carbide
2Reliability
If silicon carbide is used as substrate and drift layer, then device reliability and power handling capability are improved, but electron mobility remains low
Solution Approach 1:
The patent creates locally optimized regions where the body has higher doping to enhance carrier generation and mobility, while the drift region maintains lower doping for breakdown voltage. This local differentiation improves electron mobility in critical regions without compromising the overall reliability provided by the silicon carbide material
Solution Approach 2:
The patent effectively creates a composite doped structure within silicon carbide, combining regions of different doping concentrations to achieve both high electron mobility in the body region and high reliability through the inherent properties of silicon carbide across the entire device
3Loss of energy
If multiple implant layers are formed with varying dopant concentrations, then carrier mobility and electrical performance are improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the doping process into multiple distinct implant layers (body implant and drift implant) with different concentrations and depths. This segmentation allows precise control over the electrical profile to reduce resistance while maintaining a systematic, repeatable manufacturing process that manages complexity through structured process steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves carrier mobility and reduces resistance, enhancing performance and suitability for high-power applications.
Implementation Method 1
The silicon carbide substrate may comprise a first concentration of a first type dopant. The silicon carbide drift layer may comprise a second concentration of the first type dopant. The well implant layer may comprise a third concentration of a second type dopant.
Data Source
AI summary
A transistor that may include a silicon carbide substrate. A silicon carbide drift layer formed on the silicon carbide substrate. A well implant layer formed within the silicon carbide drift layer. A first source implant layer formed within a first portion of the well implant layer. A second source implant layer formed within a second portion of the well implant layer. An insulating layer formed over a third portion of the well implant layer and over a portion of the first source implant layer. A gate formed over the insulating layer.


