SiC MOSFET Dual-Mode Sensing for Current and Junction Temperature
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing current and temperature sensing methods for power semiconductor devices, such as SiC-based MOSFETs, are inadequate as they require additional terminals for sensing, leading to increased wafer fabrication complexity and cost, and are unable to detect short circuits or overcurrent conditions promptly, especially in high-current density applications.
Innovation Solution
A dual mode sense terminal integrated into the SiC substrate that alternates between current sensing and temperature sensing using a doped resistor region, allowing for quasi-simultaneous monitoring of both parameters with a single sense terminal, reducing the need for additional terminals and simplifying the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate current sense terminals and temperature sense terminals are used, then current sensing and temperature sensing can be performed independently, but the number of terminals increases and chip area is reduced
Solution Approach 1:
The sense terminal is designed to perform dual functions: current sensing during the on-state and temperature sensing during the off-state. This multi-functionality eliminates the need for separate terminals, preserving chip active area while maintaining independent sensing capabilities for both parameters
Solution Approach 2:
The sense terminal dynamically switches between current sensing mode (when power transistor is on) and temperature sensing mode (when power transistor is off). This dynamic reconfiguration allows the same terminal to serve different sensing purposes at different operational phases, resolving the terminal count conflict
2Adaptability or versatility
If additional lithography process steps are used to separate sense cells from main transistor cells, then integrated sensing is achieved, but wafer fabrication cost and complexity increase
Solution Approach 1:
The current sense transistor and temperature sense resistor are integrated within the same die structure using the same fabrication processes as the main power transistor. The sense terminal merges both sensing functions into a single electrical interface, eliminating the need for additional lithography steps to create separate sense cell regions
Solution Approach 2:
The sense transistor and sense resistor are fabricated using the same process steps and material layers as the main power transistor, ensuring process compatibility and eliminating the need for specialized lithography sequences. This homogeneous fabrication approach reduces manufacturing complexity while achieving integrated sensing
3Measurement precision
If five terminals are used for power device operation and sensing, then both current and temperature sensing are enabled, but package utilization decreases due to high connection efforts
Solution Approach 1:
The sense terminal serves as a universal interface for both current measurement (during on-state) and temperature measurement (during off-state). This multi-functional design reduces the terminal count from five to four, simplifying package construction and reducing connection complexity while maintaining full sensing accuracy
Solution Approach 2:
The sensing operations are performed periodically in alternating phases: current sensing during the on-state period and temperature sensing during the off-state period. This periodic multiplexing allows both measurements to be obtained through a single terminal interface, reducing the physical terminal requirements without compromising measurement precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the ability to detect faults and prevent short circuits and overcurrents effectively, improving the reliability and efficiency of power electronics systems by integrating current and temperature sensing functionalities within a single-die solution, thereby reducing the risk of device failure and enhancing safety in critical applications.
Implementation Method 1
a doped resistor region in the SiC substrate between the power transistor and the current sense transistor, wherein the dual mode sense terminal is electrically connected to source and body regions of the current sense transistor, wherein the doped resistor region has a same conductivity type as the body regions of both of the transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal
Implementation Method 2
a power transistor and a current sense transistor integrated in the SiC substrate such that the current sense transistor is configured to mirror current flow in the main power transistor
Data Source
AI summary
A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source regions of the current sense transistor. The doped resistor region has an opposite conductivity type as the source regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.