Vertical-Conduction SiC MOSFET Field Confinement

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Solution Overview

Problem

Silicon carbide-based MOSFETs face limitations due to the low carrier mobility of silicon, which restricts the achievement of lower on-resistances, and the critical electrical field of silicon limits the breakdown voltage when biased in inhibition regions.

Innovation Solution

A vertical-conduction integrated electronic device is designed with a trench MOSFET structure that includes a silicon carbide substrate, epitaxial layers, and semiconductor regions to confine the electrical field within the epitaxial silicon-carbide layers, utilizing the higher critical electrical field of silicon carbide to enhance breakdown voltage and reduce on-resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If silicon carbide is used to achieve higher breakdown voltage and lower on-resistance, then the critical electrical field increases, but carrier mobility remains low

Engineering Contradiction:
Improvebreakdown voltageVSAvoidcarrier mobility
Core Design Contradiction:
StrengthVSSpeed

Solution Approach 1:

The patent employs a composite structure combining silicon carbide epitaxial layers with metal contacts and oxide insulation layers. The silicon carbide provides high breakdown voltage capability while the metal-oxide-silicon carbide composite structure enhances carrier transport, effectively addressing both the high field strength requirement and the mobility limitation through material composition optimization.

Inventive Principle:
Principle #40Composite materials

2Speed

If silicon is used to achieve high carrier mobility, then on-resistance decreases, but the critical electrical field limits breakdown voltage

Engineering Contradiction:
Improvecarrier mobilityVSAvoidbreakdown voltage
Core Design Contradiction:
SpeedVSStrength

Solution Approach 1:

The patent applies local quality by creating distinct regions with different material properties: highly doped silicon carbide regions near contacts for low resistance, lightly doped regions for high breakdown voltage, and oxide layers for insulation. This spatial variation in material quality allows simultaneous optimization of mobility in conductive regions and field strength in depletion regions.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If silicon carbide epitaxial layers are used to increase charge concentration, then breakdown voltage improves, but electrical field generation in inhibition regions limits performance

Engineering Contradiction:
Improvecharge concentrationVSAvoidbreakdown voltage
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

The patent introduces oxide insulation layers as intermediary elements between silicon carbide regions. These oxide layers prevent harmful electrical field generation at interfaces while allowing beneficial charge concentration in the silicon carbide epitaxial layers to stand, effectively mediating between the need for high charge concentration and the avoidance of parasitic field effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The device effectively confines the electrical field within the epitaxial silicon-carbide layers, achieving higher breakdown voltages and lower on-resistances by leveraging the properties of silicon carbide, while benefiting from the high mobility of silicon carriers and low defectiveness of silicon-oxide interfaces.

Implementation Method 1

designed with a trench MOSFET structure that includes a silicon carbide substrate, epitaxial layers, and semiconductor regions to confine the electrical field within the epitaxial silicon-carbide layers

Methodology Applied
Scientific EffectElectrical field confinement: Electric Field

Implementation Method 2

silicon carbide is characterized by a bandgap that is wider than the bandgap of silicon, and hence also by a critical electrical field greater than the critical electrical field of silicon

Methodology Applied
Scientific EffectCritical electrical field: Electric Field

Implementation Method 3

the silicon-carbide layer enables a concentration of charge to be obtained greater than what may be obtained in the case of a silicon layer, given the same breakdown voltage

Methodology Applied
Scientific EffectCharge concentration: Electric Field

Implementation Method 4

U.S. Pat. No. 5,877,515, which is incorporated by reference, describes a semiconductor device having an epitaxial silicon layer, which is deposited on a silicon-carbide layer

Methodology Applied
Scientific EffectHeteroepitaxy: Epitaxy

Data Source

PatentUS8921211B2Vertical-conduction integrated electronic device and method for manufacturing thereof
Publication Date: 2014.12.30 STMICROELECTRONICS SRL
  • US8921211B2 patent drawing
  • US8921211B2 patent drawing
  • US8921211B2 patent drawing

AI summary

An embodiment of a vertical-conduction integrated electronic device formed in a body of semiconductor material which includes: a substrate made of a first semiconductor material and with a first type of conductivity, the first semiconductor material having a first bandgap; an epitaxial region made of the first semiconductor material and with the first type of conductivity, which overlies the substrate and defines a first surface; and a first epitaxial layer made of a second semiconductor material, which overlies the first surface and is in direct contact with the epitaxial region, the second semiconductor material having a second bandgap narrower than the first bandgap. The body moreover includes a deep region of a second type of conductivity, extending underneath the first surface and within the epitaxial region.