SiC MOSFET Gate Insulation Impurity Diffusion

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Solution Overview

Problem

High temperature gate bias tests on silicon carbide MOSFETs lead to threshold voltage decreases due to impurity diffusion, and existing solutions like titanium alloy barriers and silicon nitride films face challenges in complex surface structures and increased manufacturing processes.

Innovation Solution

A semiconductor device structure incorporating a silicon carbide substrate with multiple layers in the interlayer insulating film, including a silicon nitride film sandwiched by silicon oxide layers, which prevents impurity diffusion and reduces threshold voltage variations, thereby improving reliability and simplifying manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a titanium alloy barrier metal is formed on the MOS structure to prevent impurity diffusion, then the threshold voltage stability is improved, but the device complexity and manufacturing process complexity increase

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the titanium alloy barrier metal layer from the MOS structure, extracting the problematic component that caused etching process complexity. Instead, it uses a silicon oxide film as the interlayer insulating film, which can be processed with standard semiconductor fabrication techniques, thereby simplifying the manufacturing process while maintaining threshold voltage stability through alternative means.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the material parameter of the interlayer insulating film from titanium alloy to silicon oxide. This parameter change allows the use of conventional etching processes compatible with aluminum electrode pads, eliminating the need for specialized etching steps and reducing manufacturing complexity while preserving the electrical performance characteristics.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a silicon nitride film is used to prevent impurity diffusion, then the impurity diffusion prevention is improved, but the ease of manufacture deteriorates due to high hardness making complicated surface structures difficult to form

Engineering Contradiction:
Improveimpurity diffusion preventionVSAvoidsurface structure formation ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the silicon nitride film from the interlayer insulating film structure. By removing this high-hardness material, the patent eliminates the manufacturing difficulties associated with forming complicated surface structures and patterning, while maintaining impurity diffusion prevention through the use of silicon oxide film which has suitable mechanical properties for standard fabrication processes.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the material parameter from silicon nitride to silicon oxide for the interlayer insulating film. This parameter change provides a material with lower hardness and better etchability, enabling easier formation of complicated surface structures and patterns while still providing effective impurity diffusion barriers through proper film thickness and deposition quality.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If the interlayer insulating film is formed with a single layer structure, then the ease of manufacture is improved, but the reliability deteriorates due to insufficient impurity diffusion prevention

Engineering Contradiction:
Improveinterlayer insulating film formation simplicityVSAvoidimpurity diffusion prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent employs a composite interlayer insulating film structure consisting of multiple layers including a silicon oxide film as the base layer and additional functional layers. This composite structure provides enhanced impurity diffusion prevention capabilities through the synergistic effects of different materials, while maintaining ease of manufacture by using standard semiconductor fabrication processes for depositing and patterning each layer.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of a silicon nitride film sandwiched by silicon oxide layers in the interlayer insulating film effectively suppresses threshold voltage decreases and enhances the reliability of silicon carbide MOSFETs during high temperature gate bias tests, while reducing the complexity of manufacturing processes.

Implementation Method 1

the diffusion coefficient of a silicon nitride film is smaller than that of a silicon oxide (SiO2) film, thus use of a silicon nitride (SiN) film is also conceivable to prevent the diffusion of impurities

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS10079298B2Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2018.09.18 FUJI ELECTRIC CO LTD
  • US10079298B2 patent drawing
  • US10079298B2 patent drawing
  • US10079298B2 patent drawing

AI summary

A semiconductor device includes on an n-type semiconductor substrate of silicon carbide, an n-type semiconductor layer, a p-type base region, an n-type source region, a p-type contact region, a gate insulating film, a gate electrode, and a source electrode. The semiconductor device has a drain electrode on a back surface of the semiconductor substrate. On a surface of the gate electrode, an interlayer insulating film is disposed. The interlayer insulating film has plural layers among which, one layer is formed by a silicon nitride film. With such a structure, degradation of semiconductor device properties are suppressed. Further, increases in the number of processes at the time of manufacturing are suppressed.