SiC MOSFET Gate Driver Circuit With Common-Mode Current Elimination

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Solution Overview

Problem

Conventional gate drivers for silicon carbide MOSFETs in high voltage applications suffer from common-mode transient disturbances and noise coupling, leading to incorrect control signals and potential abnormal turn-on due to high dv/dt and di/dt, which are not effectively addressed by existing isolated gate drivers.

Innovation Solution

A driving circuit device incorporating CMCE circuits and current mirrors to generate a voltage difference that excludes common-mode voltage, coupled with a comparator to drive the FET, and a level shifter to manage gate voltage, along with a negative voltage generator to control the FET's turn-on and turn-off.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If isolated gate drivers with transformer galvanic isolation are used, then common-mode transient immunity is improved, but duty cycle is limited to 50%

Engineering Contradiction:
Improvecommon-mode transient immunityVSAvoidduty cycle range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces an intermediary circuit (the proposed gate driver circuit with CMCE blocks) that mediates between the high-voltage switching node and the low-voltage control circuitry. This intermediary circuit actively compensates for common-mode transients through the CMCE blocks, allowing full duty cycle operation while maintaining CMTI. The intermediary circuit includes level shifters and isolation barriers that enable bidirectional signal transmission without the 50% duty cycle limitation of transformer-based solutions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If high voltage SiC MOSFETs are used, then power conversion efficiency is improved, but common-mode transient disturbances and noise coupling increase

Engineering Contradiction:
Improvepower conversion efficiencyVSAvoidcommon-mode transient disturbances
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful common-mode transient disturbances into useful information by detecting them through the CMCE circuits and actively compensating for their effects. The CMCE blocks measure the common-mode voltage variations and generate compensating signals that cancel out the harmful transients, thereby protecting the control circuitry while enabling the use of high-voltage SiC MOSFETs for improved power conversion efficiency.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Device complexity

If large resistance resistor is used in demodulation circuit, then signal transmission is simplified, but common-mode shift increases

Engineering Contradiction:
Improvedemodulation circuit complexityVSAvoidcommon-mode shift
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent changes the operating parameters of the demodulation circuit by using the CMCE blocks to actively regulate and compensate for common-mode voltage variations. This allows the use of simpler circuit components while maintaining measurement precision, as the CMCE circuits dynamically adjust the common-mode level to prevent excessive shift that would otherwise require more complex compensation networks.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively eliminates common-mode transient disturbances, ensuring accurate control signals and preventing abnormal turn-on, thereby enhancing the reliability and performance of silicon carbide MOSFETs in high voltage applications.

Implementation Method 1

The current-to-voltage converter includes a first current mirror and a second current mirror. The first current mirror is coupled to the first current source. The second current mirror is coupled to the second current source. The first mirror and the second mirror are configured to receive the constant currents, common-mode currents, and differential currents, thereby controlling the first CMCE circuit and the second CMCE circuit to generate a voltage difference that excludes a common-mode voltage corresponding to the common-mode currents.

Methodology Applied
Scientific EffectCurrent mirror:

Implementation Method 2

The first comparator is coupled to the gate of the FET, the first CMCE circuit, and the second CMCE circuit and configured to receive the voltage difference to drive the FET.

Methodology Applied
Scientific EffectComparator:

Implementation Method 3

along with a negative voltage generator to control the FET's turn-on and turn-off

Methodology Applied
Scientific EffectLevel shifting:

Data Source

PatentUS12388351B2Driving circuit device
Publication Date: 2025.08.12 CHIP GAN POWER SEMICON CORP
  • US12388351B2 patent drawing
  • US12388351B2 patent drawing
  • US12388351B2 patent drawing

AI summary

A driving circuit device includes a first current source, a second current source, a first common-mode current elimination (CMCE) circuit, a second common-mode current elimination (CMCE) circuit, a current-to-voltage converter, and a first comparator. The current sources provide constant currents. The current-to-voltage converter includes a first current mirror and a second current mirror. The control terminal of the first current mirror is coupled to the second CMCE circuit. The control terminal of the second current mirror is coupled to the first CMCE circuit. The first current mirror and the second current mirror receive the constant currents, common-mode currents, and differential currents, thereby controlling the first CMCE circuit and the second CMCE circuit to generate a voltage difference that excludes a common-mode voltage corresponding to the common-mode currents. The first comparator receives the voltage difference to drive a field-effect transistor.