SiC MOSFET Gate Insulation Breakdown Prevention
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Solution Overview
Problem
Conventional silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) face challenges in achieving high breakdown voltage and preventing breakdown of the insulating film during switching and avalanche events, particularly due to parasitic bipolar transistors and high displacement currents, which can lead to electric field concentration and film breakdown.
Innovation Solution
A silicon carbide semiconductor device with a laminated structure including a transistor region, termination region, and diode region, featuring a second conductive type well region with a higher impurity concentration, a gate insulating film, and a third ohmic electrode between the gate line and termination region, which disperses displacement currents and reduces potential rise, thereby preventing insulating film breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional SiC-MOSFET structure is used, then the device can achieve basic switching function, but the breakdown voltage is limited and insulating film breakdown occurs during avalanche events
Solution Approach 1:
The device is divided into multiple functional regions: a first region containing the MOSFET cell with insulating film, and a second region adjacent to it. This segmentation allows different structural configurations in each region to optimize for their specific functions - the first region for switching with high breakdown voltage requirement, and the second region for avalanche energy dissipation, thereby preventing insulating film breakdown while maintaining high breakdown voltage
Solution Approach 2:
Different regions of the device are given different structural qualities: the first region has a configuration optimized for high breakdown voltage (with specific well region and insulating film structure), while the second region has a configuration optimized for avalanche resistance (with different well region structure and no insulating film). This local differentiation allows each region to excel at its specific function without compromising the other
Solution Approach 3:
The second region acts as an intermediary structure between the high-voltage switching region and the substrate. It provides a transition zone that handles avalanche energy dissipation through its specific well region structure, thereby protecting the insulating film in the first region from breakdown while allowing the device to achieve high breakdown voltage
2Adaptability or versatility
If the gate electrode is located distant from the gate pad, then the layout flexibility increases, but the gate resistance increases causing time lag in potential
Solution Approach 1:
A gate line is introduced as an intermediary conductive structure connecting the gate pad to the gate electrode. This gate line provides a low-resistance path for potential distribution, eliminating the time lag that would otherwise occur due to the distance between gate pad and gate electrode, while still allowing layout flexibility in the MOSFET cell design
3Ease of manufacture
If polysilicon is used for the gate electrode, then the manufacturing process is simplified, but the gate resistance increases reducing switching speed
Solution Approach 1:
A gate line made of low-resistance material serves as an intermediary between the gate pad and the polysilicon gate electrode. This gate line compensates for the high resistance of polysilicon by providing a low-resistance current path, thereby maintaining fast switching speed while allowing the use of simplified polysilicon fabrication processes for the gate electrode
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively enhances the breakdown voltage and prevents insulating film breakdown, as evidenced by a significantly higher avalanche resistance value, indicating improved semiconductor performance under avalanche conditions.
Implementation Method 1
a third ohmic electrode between the gate line and termination region, which disperses displacement currents and reduces potential rise, thereby preventing insulating film breakdown
Implementation Method 2
The solution effectively enhances the breakdown voltage and prevents insulating film breakdown, as evidenced by a significantly higher avalanche resistance value
Data Source
AI summary
A silicon carbide semiconductor device includes a transistor region, a diode region, a gate line region, and a gate pad region. The gate pad region and the gate line region are each disposed to be sandwiched between the diode region and the diode region, and a gate electrode on the gate pad region and the gate line region is formed on an insulating film formed on an epitaxial layer. Thus, breakdown of the insulating film in the gate region can be prevented without causing deterioration in quality of the gate insulating film, upon switching and avalanche breakdown.