Trench-Gate SiC MOSFET Gate Oxide Stabilization for Breakdown Control

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Solution Overview

Problem

Conventional trench-gate MOSFETs experience dielectric breakdown due to high electric field concentration at the gate oxide layer bottom, which is exacerbated by thermal oxidation processes that unevenly thicken the side portion of the gate oxide film.

Innovation Solution

Perform H2 annealing and a sacrificial oxidation process (SOP) before forming the gate oxide film to stabilize the gate oxide film, removing carbon compounds generated during H2 annealing and reducing reverse leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thermal oxidation is used to thicken the bottom portion of the gate oxide film, then dielectric breakdown is reduced, but the side gate oxidation film becomes very thick

Engineering Contradiction:
Improvedielectric breakdown resistanceVSAvoidside gate oxide film thickness
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The oxidation process is segmented into two distinct stages: first, a thin gate oxide film is formed by thermal oxidation; second, a thick sacrificial oxide layer is grown on the trench sidewalls through controlled oxidation. This segmentation allows the bottom gate oxide to maintain appropriate thickness for breakdown resistance while the sidewall oxidation is controlled to prevent excessive thickness buildup.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The preliminary thermal oxidation step forms a thin gate oxide film before any thickening attempts. This preliminary action establishes a baseline protective layer that prevents dielectric breakdown, while subsequent processes focus on sidewall management rather than bottom thickening.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If oxidation time is increased to thicken the bottom portion, then electric field concentration is reduced, but the side oxidation film becomes excessively thick

Engineering Contradiction:
Improveelectric field concentration resistanceVSAvoidoxidation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The oxidation process is divided into two time-separated stages: a brief initial oxidation (short time) forms the thin gate oxide, followed by a controlled second oxidation stage that grows the sacrificial sidewall oxide. This temporal segmentation eliminates the need for prolonged single-stage oxidation, reducing total process time while achieving both electric field mitigation and controlled oxide thickness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The preliminary thin oxide formation establishes the necessary dielectric barrier quickly, eliminating the need for extended oxidation times that would cause excessive sidewall thickening. The preliminary action satisfies the reliability requirement without incurring time penalties.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If blanket SiO2 deposition and etch back are used to form thick bottom oxidation film, then dielectric breakdown is prevented, but manufacturing complexity increases

Engineering Contradiction:
Improvedielectric breakdown preventionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex blanket deposition and etch back sequence is replaced by extracting only the essential function: forming a thin gate oxide through simple thermal oxidation. The problematic thickening step is removed entirely, as electric field management is achieved through the sacrificial sidewall oxide rather than bottom oxide thickening, thereby reducing manufacturing complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The oxidation process, which naturally tends to thicken sidewalls more than the bottom, is converted from a harmful effect into a beneficial feature. The sacrificial sidewall oxide that would normally be considered a defect is intentionally grown and used to manage electric fields, transforming the complexity issue into a functional advantage.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in a high-quality, stable gate oxide film, enabling micronization of devices with low ON-resistance and high withstand voltage, while reducing reverse leakage current and maintaining breakdown voltage.

Implementation Method 1

The substrate with the trench structure may be annealed in a H2 atmosphere before the formation of the gate electrode

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

a carbon compound generated in a SiC interface by the annealing may be oxidized or removed by the SOP

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 3

Before the formation of the gate electrode, a sacrificial oxidation process (SOP) may be performed in which dry oxidation is conducted at 800-1200° C. for 30-50 minutes

Methodology Applied
Scientific EffectDry oxidation: Oxidation

Data Source

PatentUS12414350B2Trench-gate sic mosfet device and manufacturing method therefor
Publication Date: 2025.09.09 KOREA ELECTROTECH RES INST
  • US12414350B2 patent drawing
  • US12414350B2 patent drawing
  • US12414350B2 patent drawing

AI summary

The present invention relates to a trench-gate SiC MOSFET device and a manufacturing method therefor. The trench-gate SiC MOSFET device of the present invention comprises: a gate oxide film covering a gate trench formed in a SiC substrate (e.g., an n-type 4H-SiC substrate); a doped well (e.g., BPW) formed in a bottom region of the gate trench; a gate electrode formed in the gate trench covered by the gate oxide film; an interlayer insulating film formed on the gate electrode; a source electrode covering the top surface of a doping layer for a source area formed on the entire surface of an epitaxial layer of the substrate and the top surface of the interlayer insulating film; and a drain electrode formed on the rear surface of the substrate.