SiC MOSFET Hard Mask Process for Current Symmetry
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Solution Overview
Problem
Conventional methods for making semiconductor devices like MOSFETs are complex, requiring multiple masks and precise alignment, which leads to performance issues such as current asymmetry and difficulty in reducing the distance between adjacent units, especially for SiC MOSFETs.
Innovation Solution
A two-step hard mask process is introduced to enable self-alignment of the source region to the channel, allowing for the formation of contact and sinker regions in a single ion implantation step, reducing the need for separate masks and enabling flexible adjustment of implantation parameters to improve device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple masks are used for ion implantation to form body region, sinker region and source region, then the semiconductor device can be manufactured with conventional processes, but the manufacturing process becomes complex and current asymmetry occurs
Solution Approach 1:
The patent combines the formation of body region, sinker region, and source region into a single ion implantation process by using a specifically designed hard mask structure. The hard mask includes a first portion and a second portion that work together to define all three regions simultaneously, eliminating the need for multiple separate masks and implantation steps. This merging approach resolves the technical contradiction by reducing manufacturing complexity while maintaining current symmetry through precise geometric design of the hard mask portions.
Solution Approach 2:
The hard mask structure serves multiple functions simultaneously: it defines the body region through its first portion, defines the sinker region through its second portion, and acts as a mask for subsequent source region formation. This multi-functional hard mask eliminates the need for separate masks for each region, reducing process complexity while ensuring proper alignment and current symmetry in the final device.
2Length of moving object
If multiple masks are used for forming different doped regions, then complete region formation is achieved, but the distance between adjacent MOSFET units cannot be reduced
Solution Approach 1:
By merging the mask functions into a single hard mask structure with specifically designed portions, the patent enables closer spacing between adjacent MOSFET units. The integrated hard mask eliminates alignment errors that would accumulate with multiple masks, allowing for reduced pitch and closer unit spacing while maintaining precise definition of body region, sinker region, and source region.
3Reliability
If conventional mask processes are used, then manufacturing can proceed with standard processes, but device performance is degraded due to current asymmetry
Solution Approach 1:
The patent merges multiple mask functions into a single hard mask structure, simplifying the manufacturing process while improving device performance. The integrated design eliminates alignment errors between multiple masks, ensuring symmetric current flow and consistent device characteristics without requiring complex multi-step mask processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces cost, and enhances device performance by mitigating current asymmetry and allowing for closer packing of MOSFET units, thereby improving switching speed and reducing bulk resistance.
Implementation Method 1
forming a body region in the semiconductor layer by using the patterned first hard mask as mask, the body region being of a second conductivity type different from the first conductivity type, providing a second hard mask on the patterned first hard mask and the exposed surface of the semiconductor layer, patterning the second hard mask to obtain a patterned second hard mask, and forming a contact region and a sinker region by using the patterned first hard mask and the patterned second hard mask as mask
Data Source
AI summary
An exemplary method of making a semiconductor device includes providing a semiconductor layer of a first conductivity type, providing a first hard mask on a surface of the semiconductor layer, patterning the first hard mask to obtain a patterned first hard mask to obtain an exposed surface of the semiconductor layer, forming a body region in the semiconductor layer by using the patterned first hard mask as mask, the body region being of a second conductivity type different from the first conductivity type, providing a second hard mask on the patterned first hard mask and the exposed surface of the semiconductor layer, patterning the second hard mask to obtain a patterned second hard mask, and forming a contact region and a sinker region by using the patterned first hard mask and the patterned second hard mask as mask.