SiC MOSFET Interface Implantation for Threshold Voltage Recovery
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Solution Overview
Problem
SiC MOSFETs exhibit poor inversion layer mobility due to a poor gate oxide interface, leading to high power dissipation and efficiency loss, and existing methods to improve mobility result in reduced threshold voltage.
Innovation Solution
A method involving a device structure with a dielectric layer over an epitaxial layer, where a hardmask layer is patterned, and two ion implants are performed to form wells and an interface layer between the wells and the dielectric layer, thereby increasing the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If counter-doping or low well doping concentration is used to improve inversion layer mobility, then mobility increases, but threshold voltage decreases
Solution Approach 1:
The patent segments the doping process into two distinct ion implantation steps: first forming a well with baseline doping concentration, then forming a separate interface layer with higher doping concentration at the gate oxide interface. This segmentation allows independent optimization of mobility (via well doping) and threshold voltage (via interface layer doping) without the trade-off present in conventional single-step doping approaches.
Solution Approach 2:
The patent applies local quality by creating a non-uniform doping profile where the interface layer has higher doping concentration specifically at the gate oxide interface region, while the bulk well maintains lower doping concentration. This localized high doping at the interface improves threshold voltage without significantly impacting the mobility-determining bulk region, resolving the contradiction between mobility and threshold voltage.
2Reliability
If low surface doping concentration is used to reduce coulombic scattering, then mobility improves, but threshold voltage decreases
Solution Approach 1:
The patent segments the doping function into two separate layers: the well provides baseline doping for electrical characteristics, while the interface layer provides localized high doping at the gate oxide interface. This segmentation enables low bulk doping (reducing coulombic scattering and improving mobility) while maintaining high interface doping (maintaining threshold voltage).
Solution Approach 2:
The interface layer creates local quality by concentrating high doping specifically at the gate oxide interface where it is most needed for threshold voltage control, while allowing the bulk well to maintain low doping concentration for optimal mobility. This spatial differentiation resolves the contradiction between mobility and threshold voltage requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively increases the MOSFET threshold voltage, enhancing SiC mobility and reducing power dissipation, while maintaining efficiency.
Implementation Method 1
performing a first ion implant to form a well in the epitaxial layer
Implementation Method 2
performing a second ion implant to form an interface layer between the well and the dielectric layer
Data Source
AI summary
Disclosed herein are methods for increasing MOSFET threshold voltage to enable higher SiC mobility. In some embodiments, a method includes providing a device structure including a dielectric layer over an epitaxial layer, patterning a hardmask layer over the dielectric layer, performing a first ion implant to form a well in the epitaxial layer, and performing a second ion implant to form an interface layer between the well and the dielectric layer.