SiC MOSFET JFET Region Impurity Optimization for On-Resistance Reduction
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Solution Overview
Problem
Existing silicon carbide semiconductor devices face challenges in reducing on-resistance due to high impurity concentrations, which increase carrier scattering and hinder the reduction of on-resistance, particularly in MOSFETs where the current path is narrowed by depletion layers and impurity concentrations cancel each other out, leading to high resistivity.
Innovation Solution
A silicon carbide semiconductor device with a drift layer, body region, and JFET region, where the impurity concentrations are optimized such that the JFET region has a higher substantial impurity concentration than the drift layer, and the impurity concentration for the second conductivity type in the JFET region is minimized, allowing for a wider current path and reduced resistivity, achieved through epitaxial growth and selective ion implantation without generating crystal defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selective ion implantation is used to form n type region in p type layer, then conductivity type conversion is achieved, but total impurity concentration increases causing increased carrier scattering and higher on-resistance
Solution Approach 1:
The patent applies local quality by creating distinct regions with different impurity concentration characteristics. The JFET region is designed with N1j−N2j>N1d to maintain high substantial impurity concentration for depletion layer control, while the drift layer maintains N1d to minimize carrier scattering. This spatial differentiation of impurity concentration profiles resolves the contradiction between achieving conductivity conversion and minimizing carrier scattering.
Solution Approach 2:
The patent changes the impurity concentration parameters strategically: in the JFET region, N1j−N2j>N1d is maintained to ensure high substantial impurity concentration for proper depletion layer formation, while N2j<N1j minimizes second conductivity type impurities. In the drift layer, N1d is optimized to balance depletion layer control and carrier scattering reduction. These parameter changes resolve the technical contradiction.
2Reliability
If p type impurity and n type impurity are both present in silicon carbide, then conductivity type conversion is achieved, but impurity concentration becomes unnecessarily high increasing carrier scattering
Solution Approach 1:
The patent extracts the harmful effect of excessive impurity concentration by separating the functions of the two regions. The JFET region contains both p type and n type impurities for conductivity conversion, while the drift layer maintains only necessary n type impurity at optimized concentration N1d. This extraction of excess impurities from the drift layer reduces carrier scattering while preserving conductivity control capability in the JFET region.
Solution Approach 2:
Different regions are assigned different impurity concentration qualities: the JFET region has high substantial impurity concentration (N1j−N2j>N1d) for depletion layer control, while the drift layer has optimized impurity concentration (N1d) to minimize carrier scattering. This local differentiation resolves the contradiction between conductivity control and carrier scattering reduction.
3Reliability
If depletion layer extends from p type body region, then current path is narrowed for JFET effect, but on-resistance cannot be sufficiently reduced
Solution Approach 1:
The patent changes the impurity concentration parameters in the JFET region to N1j−N2j>N1d, which maintains high substantial impurity concentration for effective depletion layer formation and JFET effect, while minimizing second conductivity type impurities (N2j<N1j) to reduce carrier scattering. This parameter optimization resolves the contradiction between achieving JFET effect and reducing on-resistance.
Solution Approach 2:
The JFET region is given specific local quality with N1j−N2j>N1d to ensure proper depletion layer formation for JFET effect, while the drift layer maintains N1d to minimize carrier scattering. This localized optimization of impurity concentration profiles allows the JFET effect to function properly while minimizing overall on-resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a smaller on-resistance and improved off breakdown voltage by restraining the depletion layer expansion, reducing carrier scattering, and avoiding the need for ion implantation in the JFET region, thereby enhancing the electrical resistance and manufacturing efficiency.
Implementation Method 1
a substrate made of a semiconductor having a first conductivity type is first prepared. Onto the substrate, a material gas and a dopant gas of the first conductivity type are introduced to epitaxially grow a buffer layer thereon by means of vapor phase reaction. Onto the buffer layer, a material gas and a dopant gas of the first conductivity type are introduced to epitaxially grow a drift layer thereon by means of vapor phase reaction.
Implementation Method 2
Into a surface of the drift layer, ions of an impurity of a second conductivity type are implanted to form a body region. Into the body region, ions of an impurity of the first conductivity type are implanted to form a source region.
Data Source
AI summary
A drift layer has a thickness direction throughout which a current flows and has an impurity concentration N1d for a first conductivity type. A body region is provided on a portion of the drift layer, has a channel to be switched by a gate electrode, has an impurity concentration N1b for the first conductivity type, and has an impurity concentration N2b for the second conductivity type greater than the impurity concentration N1b. A JFET region is disposed adjacent to the body region on the drift layer, has an impurity concentration N1j for the first conductivity type, and has an impurity concentration N2j for the second conductivity type smaller than the impurity concentration N1j. N1j−N2j>N1d and N2j<N2b are satisfied.