SiC MOSFET Ohmic Contacts With Thermal Budget Sequencing

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Solution Overview

Problem

The existing manufacturing processes for silicon carbide (SiC) MOSFET devices face challenges in optimizing thermal budgets, leading to high-temperature steps that are harmful for certain gate dielectrics and result in disordered interfaces and instability, affecting channel mobility and threshold voltage stability.

Innovation Solution

The method involves forming ohmic contacts prior to the gate terminal, using metal silicides covered with high-melting metal layers, and optimizing the thermal budget distribution to accommodate materials incompatible with high process temperatures, allowing for the use of high-K and hydrogen-rich materials by performing the silicide formation before gate dielectric processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If high-temperature thermal oxidation and annealing processes are used to form SiO2 gate dielectric on SiC, then the gate dielectric can be formed with ease of manufacture, but the thermal budget causes disordered interface regions and high interface state density that degrade channel mobility and threshold voltage stability

Engineering Contradiction:
Improveease of manufacturing gate dielectricVSAvoidinterface quality and channel mobility
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming the gate dielectric layer before creating the source and drain ohmic contacts. This sequence allows the gate dielectric to be formed under optimized conditions without subsequent high-temperature processing that would create disordered interface regions. The gate dielectric is formed at lower temperatures to avoid interface degradation, then ohmic contacts are formed afterward through selective removal and metallization processes.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If high-k dielectric materials are used to increase threshold voltage, then the Vth value can be adjusted effectively, but the materials suffer from crystallization phenomena and degradation at the thermal budgets required for forming silicide contacts in SiC devices

Engineering Contradiction:
Improvethreshold voltage adjustment capabilityVSAvoiddielectric stability at high temperature
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent resolves this contradiction by performing the preliminary action of forming high-k dielectric layers before any high-temperature silicide contact formation. The gate dielectric stack including high-k materials is deposited and processed at lower temperatures first, establishing a stable interface before subsequent ohmic contact formation. This sequencing prevents the high-k materials from experiencing crystallization and degradation that would occur if they were exposed to high temperatures during silicide formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies parameter changes by modifying the processing temperature parameters throughout the manufacturing sequence. Lower temperatures are used for gate dielectric formation and intermediate processing steps, while higher temperatures are reserved only for final ohmic contact formation after the gate dielectric is already in place. This dynamic temperature parameter management allows high-k materials to maintain their dielectric properties while still achieving the necessary thermal processing for functional contacts.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If post-oxidation annealing in nitrogen-rich environments is performed to reduce interface state density, then the channel mobility can be improved, but the process requires high temperatures and long annealing times that increase the thermal budget and cause interfacial reoxidation

Engineering Contradiction:
Improveinterface state density and channel mobilityVSAvoidannealing time and thermal budget
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent eliminates the need for post-oxidation annealing by performing the preliminary action of forming the gate dielectric before any high-temperature processing. The gate dielectric is deposited and processed at lower temperatures under optimized conditions that directly achieve low interface state density without requiring subsequent high-temperature annealing in nitrogen-rich environments. This preliminary formation approach inherently creates a high-quality interface without the time and thermal budget costs of extended annealing processes.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the use of materials that would otherwise degrade at high temperatures, improving channel mobility and threshold voltage stability while reducing thermal budgets, thus enhancing the performance and robustness of SiC MOSFET devices.

Implementation Method 1

forming ohmic contacts by silicizing a metal, to form silicides

Methodology Applied
Scientific EffectSilicidation: Chemical Bonding

Implementation Method 2

High-temperature steps are involved in this process

Methodology Applied
Scientific EffectThermal reaction: Heating

Implementation Method 3

High-k insulators (known as 'high-k' materials) may be used in particular to increase the Vth value in on-state in SiC MOSFETs

Methodology Applied
Scientific EffectDielectric permittivity effect: Dielectric Permittivity

Implementation Method 4

Silicon oxide (SiO2) is commonly used in commercial SiC MOSFETs as a gate dielectric, owing to the ease of manufacturing by thermal oxidation of SiC

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 5

a post-oxidation annealing (POA) or post-deposition annealing (PDA) step is typically performed in environments rich in nitrogen (N2O, NO)

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentEP4333027A1Method of manufacturing ohmic contacts of an electronic device, with thermal budget optimization
Publication Date: 2024.03.06 STMICROELECTRONICS SRL
  • EP4333027A1 patent drawingFigure 1~2A
  • EP4333027A1 patent drawingFigure 2B~2C
  • EP4333027A1 patent drawingFigure 2D~2E

AI summary

Method of manufacturing an electronic device (20), comprising forming an ohmic contact (59; 61) at an implanted region (26; 55) of a semiconductor body (48). Forming the ohmic contact provides for performing a high-temperature thermal process for allowing a reaction between a metal material and the material of the semiconductor body, for forming a silicide of the metal material. The step of forming the ohmic contact is performed prior to a step of forming one or more electrical structures (52, 56) which include materials that may be damaged by the high temperature of the thermal process of forming the silicide.