SiC MOSFET Packaging with Ceramic Interposer and Double-Sided Heat Dissipation
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Solution Overview
Problem
The packaging technology of SiC power modules is limited by low heat dissipation efficiency at high temperatures and high-frequency applications, as traditional silicon-based modules are not suitable for the high power density and thermal conductivity requirements of SiC devices.
Innovation Solution
A packaging structure for SiC MOSFET modules using a ceramic interposer embedded with Schottky Barrier Diodes (SBD) and nano silver solder paste for high-temperature bonding, combined with dual DBC substrates for double-sided heat dissipation, allowing the module to operate above 300°C.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If traditional silicon-based power modules use single-sided heat dissipation, then the structure is simple, but the heat dissipation efficiency is very low
Solution Approach 1:
The patent transitions from single-sided heat dissipation to double-sided heat dissipation by adding heat dissipation capabilities in another dimension (the opposite side of the module). The lower DBC substrate is designed with heat dissipation structures that allow heat to be extracted from both the upper and lower surfaces of the power module, effectively doubling the heat dissipation area and improving thermal management efficiency.
2Speed
If traditional silicon-based power modules use wire bonding for interconnection, then the structure is simple, but the parasitic inductance is high and it is not suitable for high-frequency working environment
Solution Approach 1:
The patent extracts and eliminates the wire bonding interconnection method from the module structure. Instead of using separate wire bonds for electrical connection, the design integrates direct copper-to-copper bonding between the DBC substrates and power chips, removing the intermediate wire bonding layer and reducing parasitic inductance to enable high-frequency operation.
Solution Approach 2:
The DBC substrate copper layers serve multiple functions simultaneously: they act as electrical interconnection terminals, heat dissipation pathways, and structural support. This multi-functionality eliminates the need for separate wire bonding components, reducing overall complexity while achieving low-inductance interconnection suitable for high-frequency applications.
3Temperature
If macromolecule polymer materials like silicone gels or epoxy polymers are used as electrical insulation, then the insulation performance is good, but the highest endurable temperature is generally at 200-300 degrees
Solution Approach 1:
The patent employs composite material strategies by combining DBC (Diamond Bonded Ceramic) substrates with ceramic-based insulation structures. The DBC substrate integrates diamond thermal management layer with ceramic bonding, creating a composite structure that provides both high-temperature resistance and electrical insulation. The ceramic materials used can withstand temperatures exceeding 300°C while maintaining their insulating properties.
4Power
If SiC power modules have high power density and high working temperature, then the power efficiency is improved, but the heat dissipation becomes the bottleneck
Solution Approach 1:
The patent addresses the heat dissipation bottleneck by implementing double-sided heat dissipation structures. The lower DBC substrate is designed with heat dissipation pathways on both the upper surface (contacting power chips) and lower surface (exposed to cooling structures), effectively utilizing three-dimensional thermal management to handle the high heat flux generated by high-power-density SiC devices.
Solution Approach 2:
The DBC substrate acts as an intermediary thermal management component between the high-power SiC chips and the external cooling system. The diamond layer in the DBC substrate serves as a high-thermal-conductivity intermediary that efficiently conducts heat away from the power chips, while the ceramic bonding layer provides thermal isolation and structural support, enabling effective heat dissipation from high-power devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances thermal performance and temperature resistance, reducing thermal stress and improving heat dissipation, enabling SiC power modules to function effectively in high-temperature and high-frequency environments.
Implementation Method 1
The drain electrode (103) of the SiC MOSFET chip (1) is connected to the upper copper layer (301) of the lower DBC substrate (3) by the nano silver paste (6)
Implementation Method 2
allowing the module to operate above 300°C
Implementation Method 3
combined with dual DBC substrates for double-sided heat dissipation
Data Source
AI summary
The invention discloses a packaging structure and manufacturing method of a SiC MOSFET module, which is composed of SiC MOSFET chips, upper DBC substrate, lower DBC substrate, ceramic interposer, silicon oxide dielectric layer, nano silver pastes, redistribution layer, through-ceramic-hole conductive metals and power terminals. The SiC MOSFET chips are connected to the lower DBC substrate using nano silver pastes in the invention. Besides, some rectangular frames are made on the ceramic interposer, and the SiC MOSFET chips are embedded in the ceramic interposer by filling dielectric materials. The upper surfaces of the chips and the ceramic interposer are covered with a conductive metal redistribution layer, and the upper and lower surfaces of the ceramic interposer are interconnected with the upper and lower DBC substrates, respectively. The power terminals are led out from the conductive copper layers of the upper and lower DBC substrates. This invention can realize the high-temperature packaging of SiC MOSFET modules. By introducing double-sided heat dissipation, the thermal performance can be improved effectively. The parasitic inductance of the module can be also reduced by using planar interconnection instead of wire bonding.