SiC Trench MOSFET P-Well Connection for Oxide Protection
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Solution Overview
Problem
SiC Trench MOSFETs face a technical contradiction where preventing electric field concentration at the trench corner to avoid gate oxide breakdown leads to an increase in on-resistance (R on ).
Innovation Solution
A power semiconductor device is designed with a substrate, epitaxial layers, and conductivity type wells, including a second well of second conductivity type disposed on the bottom side of the trench and an ion implantation connection region to connect the first and second wells, thereby dispersing the electric field and maintaining low on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a bottom P-well is placed under the trench to prevent electric field concentration at the trench corner, then gate oxide breakdown is prevented, but on-resistance (R on) increases
Solution Approach 1:
The patent applies local quality by creating a P-type region specifically at the trench corner area through ion implantation, while keeping other regions with different doping characteristics. This localized P-type region disperses the electric field concentration at the critical corner area without affecting the overall low on-resistance characteristics of the device structure.
Solution Approach 2:
The patent transitions from a two-dimensional trench structure to a three-dimensional structure by adding a P-type region at the trench corner. This dimensional addition creates a new space for electric field distribution, allowing the field to disperse into the third dimension (into the substrate) rather than concentrating at the corner, thereby preventing breakdown without increasing on-resistance.
2Strength
If SiC MOSFET operates at high voltage close to 10 times that of Si devices, then high breakdown electric field is achieved, but gate insulating film is easily destroyed at the corners of the trench
Solution Approach 1:
The patent applies preliminary anti-action by pre-forming a P-type region at the trench corner before the gate insulating film is subjected to high electric field stress. This P-type region acts as a protective structure that counteracts the electric field concentration effect in advance, preventing the gate insulating film from breaking down even when the device operates at high voltages near the breakdown field strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively disperses the electric field at the trench corner, preventing gate oxide breakdown and maintaining low on-resistance, thus improving the reliability and electrical characteristics of the power semiconductor device.
Implementation Method 1
an ion implantation connection region of the second conductivity type configured to connect the first wells of the second conductivity type to the third well of the second conductivity type
Data Source
Figure 1
Figure 2~3
Figure 4A
AI summary
A power semiconductor device may include a substrate, a first epitaxial layer of first conductivity type disposed on the substrate, a second epi layer of first conductivity type disposed on the first epi layer of first conductivity type, first wells of second conductivity type spaced apart disposed on the second epi layer of first conductivity type, a third well of second conductivity type disposed in the second epi layer of first conductivity type below the spaced apart first wells of second conductivity type and an ion implantation connection region of second conductivity type configured to connect the first wells of second conductivity type to the third well of second conductivity type.