SiC MOSFET Cell Layout for Stable Reverse Conduction

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Solution Overview

Problem

The existing silicon carbide MOSFET devices face challenges in maintaining stable electrical levels and reverse conductivity due to co-implantation issues, which can lead to performance deterioration and increased production costs.

Innovation Solution

The proposed solution involves a silicon carbide MOSFET device design that integrates a Schottky barrier diode without increasing the unit element pitch, and a manufacturing method that prevents co-implantation by using a specific mask configuration and ion implantation process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If ion implantation is used to form N+ and P+ regions, then the channel region can be defined, but co-implantation causes the N+ region to extend to undesired locations where P+ regions should be formed

Engineering Contradiction:
Improvechannel region definition accuracyVSAvoidelectrical level stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent forms the N+ region first through ion implantation, then uses a mask layer to prevent P+ ion implantation in areas where the N+ region has already been formed. This preliminary formation of the N+ region followed by selective masking prevents co-implantation damage and maintains stable electrical levels in the well layer region.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a mask layer is added to prevent co-implantation, then electrical level stability is maintained, but production costs increase

Engineering Contradiction:
Improveelectrical level stabilityVSAvoidproduction cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The mask layer is formed using the same ion implantation process equipment and basic fabrication steps already required for forming the P+ and N+ regions. The mask material and formation method leverage existing process capabilities, avoiding the need for additional specialized equipment or complex process steps, thereby minimizing cost increase while achieving the desired protection against co-implantation.

Inventive Principle:
Principle #25Self-service

3Reliability

If Schottky barrier diode is directly integrated in conventional MOSFET device, then reverse conductivity is improved, but cell pitch increases and RonA increases

Engineering Contradiction:
Improvereverse conductivityVSAvoidpower density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent integrates the Schottky barrier diode function directly into the existing MOSFET cell structure by utilizing the same cell pitch. The SBD is formed by creating a Schottky contact in a specific region of the cell, merging the diode function with the transistor structure without requiring separate dedicated space, thereby maintaining high power density while achieving improved reverse conductivity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves reverse conductivity and prevents performance deterioration without the need for additional mask layers, thereby reducing production costs and enhancing market competitiveness.

Implementation Method 1

N−-type and P−-type doped regions having various concentrations, each of which includes a well layer forming a channel region, can be formed by ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS12328932B2Metal-oxide semiconductor field effect transistor device and manufacturing method therefor
Publication Date: 2025.06.10 LG ELECTRONICS INC
  • US12328932B2 patent drawing
  • US12328932B2 patent drawing
  • US12328932B2 patent drawing

AI summary

The present disclosure relates to: a MOSFET device which is applicable to a semiconductor device and, particularly, is manufactured using silicon carbide; and a manufacturing method therefor. The present disclosure provides a metal-oxide-semiconductor field effect transistor device which may comprise: a drain electrode; a substrate disposed on the drain electrode; an N-type drift layer disposed on the substrate; a plurality of P-type well layer regions disposed on the drift layer and spaced apart from each other to define a channel; an N+ region disposed on the well layer regions and adjacent to the channel; a P+ region disposed at the other side of the channel; a gate oxide layer disposed on the drift layer; a gate layer disposed on the gate oxide layer; and a source electrode disposed on the gate layer.