SiC MOSFET SBD Cell Arrangement for Hole Injection Suppression
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Solution Overview
Problem
In MOSFETs used for power control, the injection of holes during the operation of the built-in diode compromises the reliability of the gate oxide film and semiconductor material, particularly in SiC-based devices, leading to the transformation of the SiC semiconductor layer into a high resistance layer.
Innovation Solution
The semiconductor device incorporates a specific arrangement of MOSFET cells and Schottky Barrier Diode (SBD) cells in a particular cycle, where the ratio of MOSFET cells to SBD cells is optimized to suppress hole injection, improving the reliability and flexibility of the device by reducing switching loss and enhancing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a built-in diode is incorporated in the MOSFET structure, then the device can function as both MOSFET and diode for power control applications, but hole injection during diode operation compromises the reliability of the gate oxide film and semiconductor material
Solution Approach 1:
The device is divided into separate MOSFET cells and SBD cells that are arranged in a specific pattern. By segmenting the device structure and using a 1:1 alternating arrangement, the patent enables dual functionality while suppressing hole injection, as the SBD cells provide a low-resistance path that prevents hole accumulation in the MOSFET regions.
Solution Approach 2:
The Schottky Barrier Diode cells act as an intermediary structure that provides an alternative current path during reverse bias operation. This intermediary SBD structure suppresses hole injection into the MOSFET channel by offering a lower resistance path for reverse current, thereby protecting the gate oxide film and semiconductor material.
2Loss of energy
If the ratio of MOSFET cells to SBD cells is optimized, then switching loss is reduced and yield is enhanced, but the device complexity increases due to specific arrangement requirements
Solution Approach 1:
The patent employs a periodic arrangement pattern where MOSFET cells and SBD cells are alternately positioned in a 1:1 ratio. This periodic structure simplifies the design process and manufacturing alignment while optimizing the balance between MOSFET and diode functions, thereby reducing switching loss without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement effectively suppresses hole injection, improving the reliability of the semiconductor device and optimizing the tradeoff between MOSFET and SBD currents, thereby enhancing the device's performance and reducing defects.
Implementation Method 1
a plurality of third electrodes in Schottky connection with the first semiconductor region located between the second semiconductor regions in the second direction
Data Source
AI summary
According to an embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a plurality of third electrodes, and a plurality of gate electrodes. The gate electrodes and the third electrodes are arranged parallel in a second direction and periodically with a third arrangement cycle such that the ratio of the number of the gate electrodes and the third electrodes in the first region is m3 to m4 (m3, m4 being positive integers and m3 being more than or equal to m4).