SiC MOSFET Built-In SBD Layout for Stacking Fault Suppression
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Solution Overview
Problem
Silicon carbide MOSFETs face issues with increased on-resistance due to stacking fault growth from reflux current, reduced reliability, and limited surge current tolerance, which are exacerbated by using body diodes.
Innovation Solution
Incorporating a Schottky Barrier Diode (SBD) as a built-in diode in the MOSFET, with a larger projected area for the p-type silicon carbide region and optimized contact areas, to suppress stacking fault growth and enhance surge current tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a body diode is used as a built-in diode in the MOSFET, then reflux current can be handled, but stacking fault grows due to recombination energy of carriers, increasing on-resistance and reducing reliability
Solution Approach 1:
The patent changes the fundamental operating parameter of the built-in diode from bipolar operation (pn junction diode) to unipolar operation (Schottky barrier diode). This parameter change eliminates carrier recombination in the depletion region, preventing stacking fault growth while maintaining reflux current capability. The Schottky barrier diode's unipolar conduction mechanism directly addresses the harmful effect of stacking fault growth.
2Reliability
If a Schottky Barrier Diode is provided as a built-in diode to suppress stacking fault growth, then reliability improves, but surge current tolerance decreases
Solution Approach 1:
The patent segments the built-in diode structure into multiple Schottky barrier diodes arranged in parallel within the MOSFET. This segmentation distributes the surge current across multiple diode junctions, preventing any single junction from experiencing excessive current density. The segmented structure maintains unipolar operation benefits while enhancing overall surge current tolerance through parallel current paths.
Solution Approach 2:
The patent extends the diode structure into the third dimension by creating a three-dimensional arrangement of Schottky barrier diodes within the MOSFET substrate. This dimensional expansion increases the total active area for current conduction, allowing higher surge current tolerance while maintaining the unipolar operation characteristics that prevent stacking fault growth.
3Reliability
If the occupied area of the p-type silicon carbide region is increased, then stacking fault growth is suppressed, but device area increases
Solution Approach 1:
The patent applies local quality by creating regions with different p-type silicon carbide concentrations and geometries within the MOSFET structure. Specifically, the anode region of the Schottky barrier diode has a localized high concentration of p-type dopants, which effectively suppresses stacking fault growth in critical areas without requiring uniform expansion of the entire device. This localized approach maintains high reliability while minimizing overall device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves MOSFET reliability by reducing on-resistance and increasing surge current tolerance, thereby enhancing the device's operational stability and performance.
Implementation Method 1
By providing a Schottky Barrier Diode (SBD) that performs unipolar operation as a built-in diode in the MOSFET, it is possible to suppress growth of the stacking fault in the silicon carbide layer
Implementation Method 2
when a reflux current is caused to flow using a body diode, there is a problem in that a stacking fault grows in a silicon carbide layer due to recombination energy of carriers
Data Source
AI summary
A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, and a conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The first electrode includes a first region in the transistor region and a second region in the diode region. A first contact area between the conductor and the first region is larger than a second contact area between the conductor and the second region.