Asymmetric SiC Trench MOSFET Cell with Embedded SBR for Lower On-Resistance
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Solution Overview
Problem
SiC-MOSFETs face high electric-field strength at the gate oxide due to poor interface states, requiring high gate-source voltage for full device channel turn-on, leading to reliability issues and high on-resistance, while existing designs compromise channel region for shield zone installation and fail to suppress parasitic body diode turn-on.
Innovation Solution
An integrated circuit with a SiC MOSFET and SiC SBR in an asymmetric gate trench structure, featuring different gate oxide thicknesses, P-shield regions, and grounded P regions to reduce electric-field strength and on-resistance, while incorporating a SiC SBR to suppress parasitic body diode turn-on.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a shield zone is installed along the gate trench sidewall to protect the gate oxide, then the gate oxide is protected from high electric-field strength, but 50% of the channel region is sacrificed resulting in high specific on-resistance
Solution Approach 1:
The gate trench sidewall is divided into two distinct regions: a first sidewall region dedicated to the MOSFET channel and a second sidewall region dedicated to the SBR channel. This segmentation allows each region to be optimized independently, with the MOSFET region providing full channel width for low resistance and the SBR region providing gate oxide protection through its diode action, eliminating the need to sacrifice 50% of the channel region.
Solution Approach 2:
The device structure transitions from a symmetric design where both sidewalls are used for MOSFET channels to an asymmetric design where one sidewall is optimized for MOSFET conduction and the other sidewall incorporates an SBR for protection. This asymmetric configuration allows the MOSFET to maintain full channel width for low on-resistance while the SBR on the opposite sidewall provides targeted gate oxide protection.
2Ease of operation
If a higher gate-source voltage is applied to fully turn on the SiC MOSFET channel, then the device channel is fully turned on, but the electric-field strength at the gate oxide increases causing reliability issues
Solution Approach 1:
The SBR acts as an intermediary protective element between the high electric-field environment and the gate oxide. By forming a diode structure on the second gate trench sidewall, the SBR clamps the electric field and prevents excessive field strength from reaching the gate oxide, allowing the MOSFET to be fully turned on without compromising gate oxide reliability.
Solution Approach 2:
The SBR is positioned and configured to preemptively counteract the harmful effects of high electric-field strength before it can damage the gate oxide. The diode structure is designed to activate and limit the electric field at the gate oxide interface, preventing reliability issues before they occur during high-voltage operation.
3Reliability
If the channel region is reduced to accommodate the shield zone, then the shield zone can be installed for gate oxide protection, but the on-resistance increases
Solution Approach 1:
The invention merges the functions of the MOSFET channel and the protective diode structure into a single integrated device. The first gate trench sidewall provides the MOSFET channel for conduction, while the second gate trench sidewall provides the SBR for protection. This merging of functions into one device structure eliminates the need to choose between protection and low resistance, as both functions are achieved simultaneously in the same device footprint.
Data Source
AI summary
An integrated circuit comprising a SiC MOSFET and a SiC super barrier rectifier (SBR) disposed in one unit cell having an asymmetric trench gate electrode structure formed in a stripe gate trench is disclosed. A first channel region of the SiC MOSFET is formed along a first trench sidewall of the gate trench while a second channel region of the SiC SBR is formed along a first portion of a second trench sidewall opposite to the first trench sidewall of the gate trench. A source metal connects with a source region, body regions, and the gate electrode of the SiC SBR directly, and connects with a P-shield (PS) region below the gate trench through a grounded P (GP) region along a second portion of the second gate trench sidewall.