SiC MOSFET Built-In Schottky Diode for Stacking Fault Suppression

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Solution Overview

Problem

Silicon carbide (SiC) MOSFETs face issues with increased on-resistance due to stacking fault growth, and limited surge current tolerance, which affects their reliability and performance.

Innovation Solution

Incorporating a Schottky barrier diode (SBD) as a built-in diode in the MOSFET and optimizing the diode region's design, including the p-type silicon carbide region, to enhance surge current tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a pn junction diode is used as a built-in diode in the MOSFET, then the MOSFET can operate with high breakdown voltage and low loss, but stacking fault grows in the silicon carbide layer due to recombination energy of carriers, increasing on-resistance and decreasing reliability

Engineering Contradiction:
ImproveMOSFET reliabilityVSAvoidstacking fault growth
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the operating mode of the built-in diode from bipolar operation (pn junction) to unipolar operation (Schottky barrier diode). By modifying the diode structure to use a Schottky barrier at the metal-semiconductor interface, carrier recombination is eliminated, preventing stacking fault growth while maintaining the desired electrical characteristics for high breakdown voltage and low loss operation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a Schottky barrier diode is provided as the built-in diode to suppress stacking fault growth, then reliability is improved, but surge current tolerance decreases

Engineering Contradiction:
ImproveMOSFET reliabilityVSAvoidsurge current tolerance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies local quality by creating different impurity concentration regions within the semiconductor structure. Specifically, it forms a first semiconductor region with a first impurity concentration and a second semiconductor region with a second impurity concentration different from the first. This localized variation in material properties allows the Schottky barrier diode to maintain both high reliability (by preventing stacking faults) and adequate surge current tolerance (through optimized local electrical characteristics).

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses stacking fault growth, improves the reliability of SiC MOSFETs, and enhances their surge current tolerance, leading to better performance under high current conditions.

Implementation Method 1

a Schottky barrier diode (SBD) that performs a unipolar operation as the built-in diode is provided in the MOSFET

Methodology Applied
Scientific EffectSchottky barrier:

Implementation Method 2

a p-type second silicon carbide region provided between the first silicon carbide region and the first plane

Methodology Applied
Scientific EffectSemiconductor doping:

Data Source

PatentUS12342583B2Semiconductor device, inverter circuit, drive device, vehicle, and elevator
Publication Date: 2025.06.24 KK TOSHIBA
  • US12342583B2 patent drawing
  • US12342583B2 patent drawing
  • US12342583B2 patent drawing

AI summary

A semiconductor device of an embodiment includes a transistor region and a diode region. The transistor region includes an n-type first silicon carbide region having a first portion in contact with a first plane, a p-type second silicon carbide region, an n-type third silicon carbide region, a first electrode in contact with the first portion, the second silicon carbide region, and the third silicon carbide region, a second electrode in contact with a second plane, and a gate electrode. The diode region includes an n-type first silicon carbide region having a second portion in contact with the first plane, a p-type fourth silicon carbide region, a first electrode in contact with the second portion and the fourth silicon carbide region, and a second electrode. An occupied area per unit area of the fourth silicon carbide region is larger than an occupied area per unit area of the second silicon carbide region. The first diode region is provided between a first transistor region and a second transistor region.