SiC MOSFET Schottky Layout for Low ON Resistance
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Solution Overview
Problem
Conventional silicon carbide semiconductor devices with built-in Schottky barrier diodes (SBDs) face issues such as reduced unit cell density, higher ON resistance, and easy conduction of body diodes due to increased distance between pn junctions, leading to degradation of forward characteristics.
Innovation Solution
The silicon carbide semiconductor device incorporates a structure where planar SBDs are disposed further from gate trenches, with p+-type regions facing the Schottky contact portions, reducing the distance between pn junctions and enhancing the preferential operation of SBDs over body diodes, thereby suppressing degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If planar SBDs are disposed closer to gate trenches to increase unit cell density, then unit cell density is improved, but the distance between pn junctions increases causing body diodes to conduct more easily
Solution Approach 1:
The patent introduces p+-type regions with locally different conductivity properties between the planar SBD and gate trench. These p+-type regions create localized potential barriers that prevent body diode conduction in specific areas where SBDs are disposed, allowing closer spacing while maintaining reliability. The local modification of electrical properties enables higher unit cell density without compromising forward characteristics.
2Reliability
If planar SBDs are disposed further from gate trenches to prevent body diode conduction, then forward characteristics are improved, but unit cell density decreases and ON resistance increases
Solution Approach 1:
The patent introduces p+-type regions as intermediary structures between the planar SBD and gate trench. These intermediary p+-type regions act as potential barriers that prevent body diode conduction, allowing the planar SBD to be disposed closer to the gate trench without directly compromising forward characteristics. This mediator enables higher unit cell density while maintaining reliability.
3Reliability
If distance between pn junctions is increased to suppress body diode conduction, then preferential operation of SBD is improved, but ON resistance increases
Solution Approach 1:
The patent applies local quality modification by introducing p+-type regions only in specific areas between planar SBDs and gate trenches, rather than increasing the distance between all pn junctions. This localized approach creates potential barriers to suppress body diode conduction where needed, while maintaining shorter overall distances between pn junctions to keep ON resistance low.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves unit cell density, reduces ON resistance, and prevents degradation of forward characteristics by ensuring preferential operation of SBDs over body diodes, thus optimizing device performance.
Implementation Method 1
a Schottky contact portion (12a) between the n-type current spreading region (3) and a conductive layer (12) disposed on the front surface of the semiconductor substrate (40) configures a unit cell of the planar SBD (32)
Implementation Method 2
The body diode of the MOSFET is a parasitic p-intrinsic-n (pin) diode formed by a pn junction between a p-type base region, an n−-type drift region, and an n+-type drain region
Implementation Method 3
due to recombination of the holes and electrons in the n−-type drift region, stacking faults originating from basal plane dislocations in the semiconductor substrate expand
Implementation Method 4
a plurality of trenches, respectively penetrating through the plurality of third semiconductor regions and through the plurality of second semiconductor regions, and reaching the first semiconductor region; a plurality of gate electrodes, each provided in one of the plurality of trenches via a gate insulating film
Data Source
AI summary
A silicon carbide semiconductor device, including a semiconductor substrate, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a plurality of trenches, a plurality of gate electrodes respectively provided in the trenches, a first conductive film, a first electrode, a second electrode, a plurality of first high-concentration regions, a plurality of second high-concentration regions, and a second conductive film. The first semiconductor region has a first portion and a plurality of second portions respectively at positions facing the plurality of second high-concentration regions in a depth direction. The second conductive film forms a Schottky contact with the plurality of second portions of the first semiconductor region, such that each junction surface between the second conductive film and the first semiconductor region forms a Schottky barrier of a Schottky barrier diode.