SiC Trench MOSFET Subthreshold Slope Tuning for ON Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional silicon carbide MOSFETs face a tradeoff where carrier mobility decreases as threshold voltage increases, leading to potential erroneous turning ON due to electromagnetic noise, and increasing carrier mobility results in lower ON resistance, making it challenging to balance these parameters effectively.
Innovation Solution
The silicon carbide semiconductor device incorporates a trench-type MOSFET structure with a gate insulating film and specific annealing conditions, including NO-PDA annealing time and concentration, to optimize the subthreshold slope factor (S factor) within a range of 0.24V/dec to 0.3V/dec, enhancing carrier mobility while increasing the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If carrier mobility is increased to reduce ON resistance, then ON resistance decreases, but threshold voltage decreases making the device susceptible to erroneous turning ON
Solution Approach 1:
The patent optimizes the S factor parameter to a specific range (0.22V/dec ≤ S factor < 0.26V/dec) through controlled annealing processes, which simultaneously achieves low ON resistance and high threshold voltage by modifying the subthreshold characteristics of the MOSFET
2Reliability
If threshold voltage is increased to prevent erroneous turning ON, then reliability improves, but carrier mobility decreases leading to higher ON resistance
Solution Approach 1:
The patent changes the S factor parameter to an optimized range through thermal annealing with NO-PDA treatment, which enables the device to achieve both high threshold voltage for reliability and low ON resistance through improved subthreshold slope characteristics
3Speed
If S factor is reduced to improve switching characteristics, then switching performance improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary annealing treatments (NO-PDA annealing before gate insulating film formation, and annealing after gate insulating film formation) to pre-establish the optimal S factor range, which simplifies subsequent manufacturing steps and reduces the precision requirements for final device fabrication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved tradeoff between carrier mobility and threshold voltage, achieving higher carrier mobility and threshold voltage values compared to conventional devices, thereby enhancing the switching performance and reducing the risk of erroneous turning ON.
Implementation Method 1
setting an interface between an epitaxial layer and a gate insulating film to an interface state density of less than 5×10^11 cm−2 eV−1
Implementation Method 2
silicon carbide having a band gap that is about 3 times larger than that of silicon and a dielectric breakdown field strength that is nearly one order of magnitude greater than that of silicon
Implementation Method 3
Schottky barrier diodes (SBDs) and vertical metal oxide semiconductor field effect transistors (MOSFETs) having a trench gate structure or planar gate structure have become commercialized as silicon carbide semiconductor devices
Data Source
AI summary
A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first semiconductor type, a first semiconductor layer of the first semiconductor type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first semiconductor type, trenches, a gate insulating film, and gate electrodes. The silicon carbide semiconductor device has a minimum value of a subthreshold slope factor (subthreshold swing) in a subthreshold region in a range from 0.24V/dec. to 0.3V/dec.