SiC MOSFET Source Contact Width for Short Circuit Protection
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Solution Overview
Problem
Silicon carbide MOSFETs face challenges in saturating drain current at high drain voltages, leading to excessive current flow and potential element breakage during short circuits, as they do not effectively reduce current in high voltage regions.
Innovation Solution
The silicon carbide semiconductor device is designed with a specific configuration including a silicon carbide layer, gate insulating film, and electrodes, where the contact width of the source region and source electrode is defined to maintain high electric resistance at low current values and reduce current at high voltage values, adhering to the relational expression n<−0.02RonA+0.7, thereby controlling carrier migration and suppressing excessive current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the contact width of the source region and source electrode is increased to reduce on-resistance, then the on-resistance decreases, but the drain current cannot be saturated at high drain voltages leading to excessive current flow
Solution Approach 1:
The patent applies parameter changes by establishing a specific mathematical relationship between contact width n and on-resistance RonA (n < -0.02RonA + 0.7), transforming the design from fixed dimensional specifications to dynamic parameter optimization. This allows the contact width to be precisely controlled based on the desired on-resistance value, achieving both low on-resistance and current saturation capability simultaneously
Solution Approach 2:
The patent implements local quality by creating distinct impurity regions with different conductivity types (first impurity region with first conductivity type, second impurity region with second conductivity type, third impurity region with first conductivity type). This spatial differentiation of electrical properties enables the device to achieve low on-resistance in the source region while maintaining current saturation through the body diode structure in the drift region
2Strength
If the device is designed for high voltage operation, then the breakdown voltage increases, but the drain current does not saturate at high voltages causing excessive current during short circuits
Solution Approach 1:
The patent introduces the body diode structure formed by the second impurity region (opposite conductivity type) as an intermediary element between the drift region and source region. This body diode acts as a natural current limiter that saturates the drain current at high voltages, preventing excessive current flow during short circuits while maintaining high breakdown voltage capability
Solution Approach 2:
The patent implements beforehand cushioning by pre-configuring the body diode structure and contact width parameters before short circuit conditions occur. The mathematical relationship n < -0.02RonA + 0.7 is established during device design to ensure that the device inherently limits current during fault conditions, providing protective cushioning against excessive current without requiring external protection circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces drain current in high voltage regions, preventing element breakage during short circuits by maintaining high electric resistance at low current values and reducing current flow when high voltages are applied, thus enhancing the device's reliability.
Implementation Method 1
migration of carriers between the first electrode and the second electrode is controlled by controlling a voltage applied to the gate electrode
Implementation Method 2
The gate insulating film is formed on the second impurity region
Data Source
AI summary
There is provided a silicon carbide semiconductor device allowing for suppression of breakage of an element upon short circuit of load. A MOSFET includes a silicon carbide layer, a gate insulating film, a gate electrode, a source electrode, and a drain electrode. The silicon carbide layer includes a drift region, a body region, and a source region. The MOSFET is configured such that a relational expression of n<−0.02RonA+0.7 is established in a case where a contact width of the source region and the source electrode is represented by n (μm) in a cross section in a thickness direction of the silicon carbide layer and a migration direction of carriers in the body region and where on resistance of the MOSFET in a state in which an inversion layer is formed in a channel region is represented by RonA (mΩcm2).