SiC Trench-Gate MOSFET Layout for Flexible Superjunction Density
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Solution Overview
Problem
Conventional silicon-based power devices struggle to operate under high power and high frequency conditions with high heat resistance and low power consumption, and SiC-based trench-gate MOSFETs face challenges in controlling native oxide quality and substrate defects, limiting adjustable trench density and channel resistance.
Innovation Solution
A trench-gate transistor device with a substrate of silicon carbide, featuring superjunctions arranged in one direction and a rectifying area with Schottky-based diodes, along with active units positioned intersectingly, allowing for independent adjustment of superjunction widths and channel widths, and incorporating heavily-doped regions under gate trenches to reduce fringing fields and gate-to-drain capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the pitch between p-type and n-type columns is adjusted to improve channel resistance and breakdown voltage, then the electrical performance is improved, but the trench density cannot be adjusted arbitrarily due to the fixed P/N superjunction structure arrangement
Solution Approach 1:
The patent transitions from a one-dimensional linear arrangement of P/N superjunctions to a two-dimensional grid arrangement where superjunctions are distributed across both horizontal and vertical directions. This dimensional change enables independent control of trench density in different orientations, allowing flexible adjustment of channel resistance and breakdown voltage without being constrained by a fixed single-direction structure.
2Reliability
If the length of trench gate is increased to achieve higher breakdown voltage and lower on-state resistance, then the electrical performance is improved, but the device area increases
Solution Approach 1:
The patent extends the trench gate structure from a single linear direction into a two-dimensional grid pattern, allowing the effective gate length to be increased through vertical stacking while maintaining a compact horizontal footprint. This enables higher breakdown voltage achievement without proportionally increasing the overall device area.
Solution Approach 2:
The patent implements nested trench gate structures where multiple trench gates are stacked vertically within the same horizontal area. This nesting approach allows the effective gate length to be multiplied by the number of stacked layers, achieving higher breakdown voltage while keeping the device area constant or minimally increased.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances flexibility in device structure adjustment, reduces power consumption during forward and reverse recovery times, and improves breakdown voltage endurance by minimizing fringing fields and gate-to-drain capacitance, thus addressing the limitations of conventional SiC-based devices.
Implementation Method 1
a rectifying area that has at least one Schottky-based diode
Data Source
AI summary
A trench-gate transistor device includes a substrate and a transistor structure. The transistor structure includes a plurality of superjunctions arranged in a first direction, a rectifying area that has at least one Schottky-based diode, and at least one active unit that is located at a side of said rectifying area in a second direction that intersects with the first direction.