SiC MOSFET Surface Barrier Modulation for Conductive Loss Reduction
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Solution Overview
Problem
The use of 4H-type silicon carbide in semiconductor devices leads to increased conductive loss and potential reliability issues due to high built-in diode on-voltage and the generation of stacking faults from carrier recombination, which complicates the design of power circuits like inverter circuits where both low conduction and switching losses are desired.
Innovation Solution
A semiconductor device with a specific vertical electrode structure and impurity concentration profile is designed, featuring a MOSFET with a modulated surface barrier using a MOS gate to control the energy barrier between semiconductor regions, reducing carrier recombination and suppressing positive hole injection into the drift region, thereby improving switching performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If 4H-type silicon carbide is used as semiconductor material, then breakdown voltage is improved, but conductive loss increases due to high built-in diode on-voltage
Solution Approach 1:
The patent applies a MOS gate structure to dynamically control the surface barrier potential at the semiconductor surface. By applying different gate voltages, the surface barrier can be modulated between accumulation and depletion states, enabling dynamic adjustment of the built-in diode's on-voltage. This allows the device to maintain high breakdown voltage while reducing conductive loss through gate-controlled surface potential modulation.
Solution Approach 2:
The invention changes the electrical parameters at the semiconductor surface by introducing a MOS gate that can alter the surface barrier height. By controlling the gate voltage, the surface potential and consequently the built-in diode characteristics are modified, enabling the device to operate with lower on-voltage and reduced conductive loss while preserving the high breakdown voltage property of 4H-SiC.
2Strength
If 4H-type silicon carbide is used as semiconductor material, then breakdown voltage is improved, but reliability deteriorates due to stacking fault generation from carrier recombination
Solution Approach 1:
The MOS gate structure is designed to preemptively control the surface barrier and suppress carrier recombination before it can generate stacking faults. By maintaining proper surface potential through gate control, the invention prevents the conditions that lead to dislocation expansion and stacking fault formation, thereby protecting the crystal structure and ensuring device reliability.
Solution Approach 2:
The MOS gate acts as an intermediary between the external control circuit and the semiconductor bulk. It mediates the surface conditions by controlling the surface barrier, thereby preventing direct interaction between carriers and dislocations that would otherwise lead to stacking fault generation. This intermediary control mechanism protects the crystal structure while allowing high-voltage operation.
3Speed
If MOSFET with built-in diode is used in inverter circuit, then switching performance is improved, but reverse recovery loss increases
Solution Approach 1:
The MOS gate enables dynamic control of the surface barrier during switching operations. During reverse recovery, the gate can be controlled to maintain depletion mode, which suppresses carrier injection and minimizes reverse recovery charge. This dynamic control allows fast switching performance while significantly reducing reverse recovery loss compared to conventional MOSFETs with fixed surface barriers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces reverse recovery loss and prevents the expansion of defects in the SiC crystal, allowing for a compact, low-cost inverter circuit with lower conduction loss and enhanced reliability by maintaining a controlled energy barrier and suppressing positive hole injection.
Implementation Method 1
a MOSFET with a modulated surface barrier using a MOS gate to control the energy barrier between semiconductor regions
Implementation Method 2
reducing carrier recombination and suppressing positive hole injection into the drift region
Data Source
AI summary
According to one embodiment, a semiconductor device includes first electrode and second electrodes, first, second, third, fifth, and fourth semiconductor regions, a third electrode, and a second insulating film. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the first electrode. The third semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is provided between the first semiconductor region and the second electrode. The fourth semiconductor region is provided between the third semiconductor region and the second electrode and between the fifth semiconductor region and the second electrode. The third electrode contacts the first, third, and fourth semiconductor regions via a first insulating film. The second insulating film contacts the first, fifth, and fourth semiconductor regions.