SiC MOSFET Surface Structure for Low-Defect Gate Oxide Interfaces

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Solution Overview

Problem

Silicon carbide (SiC) semiconductor devices face reliability issues due to decreased gate insulating layer reliability and carrier mobility caused by interface states between the SiC layer and the gate insulating layer, particularly in MOSFETs.

Innovation Solution

A semiconductor device with a silicon carbide layer having a specific off-angle and 4H—SiC crystal structure, incorporating a nitrogen-rich interface termination region between the silicon carbide layer and the gate insulating layer to reduce interface states and enhance carrier mobility, along with a manufacturing process involving ion implantation and heat treatments to optimize the surface structure and nitrogen distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a metal oxide semiconductor field effect transistor is formed using silicon carbide, then high temperature operation with low loss is achieved, but the reliability of the gate insulating layer decreases due to interface states

Engineering Contradiction:
Improveoperating temperatureVSAvoidgate insulating layer reliability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent applies local quality by creating a nitrogen-rich interface termination region specifically at the silicon carbide layer interface with the gate insulating layer. This localized nitrogen enrichment (with concentration of 1×10^21 cm^-3 or more) targets only the problematic interface area to reduce interface states, while the bulk silicon carbide layer maintains its high temperature operational properties. The off-angle of 0° or more and 8° or less with respect to the {0001} face is also a local structural modification to optimize interface quality.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes physical and chemical parameters at the interface: nitrogen concentration is increased to 1×10^21 cm^-3 or more in the interface termination region, and the crystal orientation is controlled with an off-angle of 0° or more and 8° or less with respect to the {0001} face. These parameter changes reduce interface states while preserving the bulk material's high temperature performance characteristics.

Inventive Principle:
Principle #35Parameter changes

2Temperature

If a metal oxide semiconductor field effect transistor is formed using silicon carbide, then high temperature operation with low loss is achieved, but carrier mobility decreases due to interface states

Engineering Contradiction:
Improveoperating temperatureVSAvoidcarrier mobility
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent applies local quality by creating a nitrogen-rich interface termination region specifically at the silicon carbide layer interface with the gate insulating layer. This localized nitrogen enrichment (with concentration of 1×10^21 cm^-3 or more) targets only the problematic interface area to reduce interface states that scatter carriers, while the bulk silicon carbide layer maintains its high temperature operational properties and high carrier mobility.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the nitrogen concentration parameter to 1×10^21 cm^-3 or more in the interface termination region and controls the crystal orientation with an off-angle of 0° or more and 8° or less with respect to the {0001} face. These parameter changes reduce interface state density, thereby improving carrier mobility while preserving high temperature operation capability.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If ion implantation and heat treatments are used to optimize surface structure and nitrogen distribution, then interface states are reduced and device performance is enhanced, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing ion implantation to introduce nitrogen into the silicon carbide layer before forming the gate insulating layer. This preliminary nitrogen enrichment creates the interface termination region in advance, ensuring that when the gate insulating layer is subsequently formed, the interface already has optimized nitrogen distribution to minimize interface states. This sequencing simplifies the overall process compared to attempting to modify the interface after gate insulator formation.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses the decrease in reliability of the gate insulating layer and carrier mobility, improving the overall characteristics of the MOSFET by reducing interface states and dangling bonds, thereby enhancing the device's performance.

Implementation Method 1

a manufacturing process involving ion implantation and heat treatments to optimize the surface structure and nitrogen distribution

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a manufacturing process involving ion implantation and heat treatments to optimize the surface structure and nitrogen distribution

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS11824083B2Semiconductor device, semiconductor device manufacturing method, inverter circuit, drive device, vehicle, and elevator
Publication Date: 2023.11.21 KK TOSHIBA
  • US11824083B2 patent drawing
  • US11824083B2 patent drawing
  • US11824083B2 patent drawing

AI summary

A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face opposite to the first face, and including a p-type silicon carbide region in contact with the first face, a percentage of a first silicon atom among a plurality of silicon atoms present in a first layer as an uppermost layer being equal to or more than 90% and a site position of the first silicon atom being different from a site position of a silicon atom in a third layer from the first face and the same as a site position of a silicon atom in a fifth layer from the first face; a gate electrode; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region between the silicon carbide layer and the silicon oxide layer including nitrogen.