SiC MOSFET Tapered Buffer Reduces Stacking Faults
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Solution Overview
Problem
The use of a pn junction diode in silicon carbide-based MOSFETs leads to reflux current, causing stacking faults and increased on-resistance, which degrades the reliability of the device.
Innovation Solution
A planar gate type vertical MOSFET with a Schottky barrier diode (SBD) is designed, featuring a silicon carbide layer with specific impurity regions and gate structures, including a tapered buffer region to minimize stress and prevent cracking, thereby reducing the growth of stacking faults.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a pn junction diode is used to allow reflux current flow, then the MOSFET can operate with inductive load, but stacking faults grow due to carrier recombination energy, increasing on-resistance and degrading reliability
Solution Approach 1:
The patent extracts and removes the pn junction diode structure from the silicon carbide layer, eliminating the harmful carrier recombination process that causes stacking faults. Instead, a separate parasitic diode structure is formed using the drift region and body region, which does not cause stacking fault growth in the silicon carbide layer.
Solution Approach 2:
The patent introduces an intermediary structure - a parasitic diode formed by the drift region and body region - that mediates the reflux current flow. This parasitic diode allows the MOSFET to operate with inductive loads while preventing the direct carrier recombination in the silicon carbide layer that would cause stacking faults.
2Ease of operation
If a pn junction diode is used as parasitic built-in diode, then reflux current can flow when MOSFET is turned off, but stacking faults grow in silicon carbide layer due to recombination energy, causing on-resistance increase
Solution Approach 1:
The patent extracts the pn junction diode from the silicon carbide layer, removing the source of recombination energy that causes stacking faults and on-resistance increase. The reflux current capability is maintained through a different structural approach using the drift and body regions.
Solution Approach 2:
The patent applies local quality by creating specific doped regions (drift region with first doping concentration, body region with second doping concentration) that have different electrical properties. This local differentiation allows controlled current flow while preventing widespread stacking fault growth in the silicon carbide layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SBD-based MOSFET effectively suppresses characteristic fluctuations and improves reliability by reducing thermal stress and preventing film peeling, maintaining low on-resistance and enhancing operational stability.
Implementation Method 1
A planar gate type vertical MOSFET with a Schottky barrier diode (SBD) is designed
Implementation Method 2
featuring a silicon carbide layer with specific impurity regions and gate structures, including a tapered buffer region to minimize stress and prevent cracking
Data Source
AI summary
A semiconductor device according to an embodiment includes a silicon carbide layer having first and second planes; a first silicon carbide region; second and third silicon carbide regions between the first silicon carbide region and the first plane; a fourth silicon carbide region between the second silicon carbide region and the first plane; a first and second gate electrodes; a suicide layer on the fourth silicon carbide region; a first electrode on the first plane having a first portion and a second portion, the first portion being in contact with the first silicon carbide region, the second portion being in contact with the suicide layer; a second electrode on the second plane; and an insulating layer between the first portion and the second portion having a first side surface and a second side surface, an angle of the first side surface being smaller than that of the second side surface.