SiC MOSFET Trench Gate Segmentation for Short-Circuit Withstand

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Solution Overview

Problem

Silicon carbide (SiC) MOSFETs face breakdown issues due to heat generation during short-circuit events, leading to a lack of short-circuit withstand capability, which is critical for high-power applications.

Innovation Solution

The design incorporates a trench gate type vertical MOSFET structure with specific p+-type connection regions that suppress dielectric breakdown by dispersing current flow, reducing local heat generation through optimized placement and pitch of connection regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a MOSFET using silicon carbide is used to operate at high temperature and low loss, then the operational efficiency is improved, but the short-circuit withstand capability deteriorates due to heat generation during short-circuit events

Engineering Contradiction:
Improveoperational efficiencyVSAvoidshort-circuit withstand capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent segments the current flow path by introducing multiple p+-type connection regions between the drift region and source region. These segmented regions distribute the current flow into multiple parallel paths, preventing current concentration and reducing local heat generation during short-circuit events, thereby improving short-circuit withstand capability while maintaining operational efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating regions with different doping characteristics. The p+-type connection regions have high doping concentration to reduce resistance and heat generation, while the n-type drift region maintains low doping for high breakdown voltage. This localized differentiation allows the device to achieve both low loss during normal operation and high short-circuit withstand capability

Inventive Principle:
Principle #3Local quality

2Device complexity

If the current flow is concentrated in a small region, then the device structure is simplified, but local heat generation increases causing MOSFET breakdown

Engineering Contradiction:
Improvestructure complexityVSAvoidlocal heat generation
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The patent introduces multiple p+-type connection regions that segment the current flow into multiple paths. This segmentation distributes the current and heat generation across a larger area, reducing peak temperature while adding only moderate structural complexity through the inclusion of these additional doped regions

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends the current distribution in the horizontal dimension by placing multiple p+-type connection regions side by side between the drift region and source region. This dimensional expansion distributes current flow laterally, reducing vertical heat concentration and preventing breakdown without significantly increasing overall device complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the short-circuit withstand capability of SiC MOSFETs by dispersing current flow and reducing heat generation, thereby improving operational stability and reliability.

Implementation Method 1

Breakdown of MOSFET is thought to be due to heat generation caused by large current flow

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS10770549B2Semiconductor device, inverter circuit, driving device, vehicle, and elevator
Publication Date: 2020.09.08 KK TOSHIBA
  • US10770549B2 patent drawing
  • US10770549B2 patent drawing
  • US10770549B2 patent drawing

AI summary

A semiconductor device according to an embodiment includes a silicon carbide layer having a first and second plane, first and second trench extending in first direction, and in the silicon carbide layer, n-type first region, p-type second region between the n-type first region and the first plane and between the first and second trench, p-type fifth region covering bottom of the first trench, p-type sixth region covering bottom of the second trench, n-type seventh region between the fifth region and the second region, n-type eighth region between the sixth and second regions, p-type ninth regions contacting the fifth and second regions, and p-type tenth regions contacting the sixth region and the second region, the ninth and tenth regions repeatedly disposed in the first direction, and a line segment connecting the ninth region and the tenth region is oblique with respect to second direction perpendicular to the first direction.