SiC MOSFET Source Attachment Doping for Vth Roll-Off Control
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Solution Overview
Problem
Modern planar gate SiC MOSFETs with submicron channels face significant challenges due to the threshold voltage roll-off effect and channel length variations caused by etch-back process non-uniformities in the self-aligned channel formation technique, leading to poor statistical distribution of threshold voltage and on-state resistance.
Innovation Solution
The proposed solution involves a silicon carbide MOSFET device and method that includes forming a source attachment region with a lower doping concentration than the source region, using ion-implantation through sidewall spacers, and optimizing the mask layers to minimize channel length variations and etch-back effects, thereby reducing the threshold voltage roll-off issue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If channel length is reduced to enhance on-state performance, then on-state resistance decreases, but threshold voltage roll-off effect becomes prominent
Solution Approach 1:
The patent applies local quality by creating a graded doping profile in the source region, where the doping concentration varies spatially. Specifically, the source region has a first doping concentration in a first portion and a second doping concentration in a second portion, with the second concentration being lower than the first. This localized variation in doping quality allows the device to maintain short channel length benefits while compensating for threshold voltage roll-off through the carefully designed doping gradient in specific regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables tighter distribution of threshold voltage and on-state resistance, allowing for more precise control of channel lengths and improved performance in deep submicron regimes, effectively mitigating the threshold voltage roll-off effect.
Implementation Method 1
The source attachment region comprises a first doping concentration that is one of lower than and equal to a second doping concentration of the source region
Implementation Method 2
forming a well region by performing a first ion-implantation using second conductivity type ions through a first patterned mask layer
Data Source
AI summary
A metal-oxide-semiconductor field-effect transistor (MOSFET) device is described herein. The MOSFET device comprises a unit cell on a silicon carbide (SiC) substrate. The unit cell comprises: a source region; a well region; and a source attachment region. The source attachment region is in contact with the source region. The source attachment region is doped using first conductivity type ions. In an embodiment, the source attachment region is doped using second conductivity type ions. The source attachment region comprises a depth shallower than a depth of source region. In an embodiment, the source attachment region comprises a depth equal to a depth of the source region. The source attachment region comprises a doping concentration lower than a doping concentration of the source region. In an embodiment, the source attachment region comprises a doping concentration equal to a doping concentration of the source region.


