SiC Trench MOSFET Ion-Implanted Well Connection for Gate Oxide Reliability

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Solution Overview

Problem

The existing SiC Trench MOSFET power semiconductor devices face a technical contradiction where preventing electric field concentration at the trench corner leads to an increase in on-resistance (Ron), thereby affecting the breakdown voltage and electrical characteristics.

Innovation Solution

A power semiconductor device design that includes a substrate, epitaxial layers, first and second conductivity type wells, and an ion implantation connection region, where the second well of the second conductivity type is disposed on the bottom side of the trench and connected to the first wells through the ion implantation connection region, effectively dispersing the electric field and preventing breakdown voltage drop.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a bottom P-well is placed under the trench to prevent electric field concentration at the trench corner, then breakdown voltage is improved, but on-resistance (Ron) increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating a P-type region specifically at the trench corner area through ion implantation, while keeping other regions with different doping characteristics. This localized P-type region counteracts the electric field concentration at the corner without requiring a full bottom P-well structure, thus improving breakdown voltage while minimizing the impact on on-resistance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent performs preliminary action by pre-forming P-type regions at the trench corners through ion implantation before final device operation. This preliminary structuring of the electric field distribution prevents breakdown voltage drop without the need for a complete bottom P-well, thereby avoiding the on-resistance penalty associated with full bottom P-well structures.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the gate insulating film is formed in the trench to enable Trench MOSFET structure, then channel density is improved, but electric field concentration at trench corner causes gate oxide breakdown

Engineering Contradiction:
Improvechannel densityVSAvoidgate oxide breakdown resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by creating a P-type region specifically at the trench corner area through ion implantation, while keeping other regions with different doping characteristics. This localized P-type region counteracts the electric field concentration at the corner without requiring a full bottom P-well structure, thus improving breakdown voltage while minimizing the impact on on-resistance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces an intermediary P-type region formed by ion implantation at the trench corner, which acts as a mediator between the high electric field environment and the gate insulating film. This intermediary structure redistributes the electric field and protects the gate oxide from breakdown while preserving the high channel density benefits of the trench structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design effectively disperses the electric field concentrated at the trench corner, prevents the breakdown voltage drop of the gate insulating layer, and improves the reliability of the gate insulating layer, while maintaining low on-resistance (Ron).

Implementation Method 1

an ion implantation connection region of the second conductivity type configured to connect the first wells of the second conductivity type to the third well of the second conductivity type

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS20250203961A1Power semiconductor device and power converter including the same
Publication Date: 2025.06.19 LX SEMICON CO LTD
  • US20250203961A1 patent drawing
  • US20250203961A1 patent drawing
  • US20250203961A1 patent drawing

AI summary

A power semiconductor device may include a substrate, a first epitaxial layer of first conductivity type disposed on the substrate, a second epi layer of first conductivity type disposed on the first epi layer of first conductivity type, first wells of second conductivity type spaced apart disposed on the second epi layer of first conductivity type, a third well of second conductivity type disposed in the second epi layer of first conductivity type below the spaced apart first wells of second conductivity type and an ion implantation connection region of second conductivity type configured to connect the first wells of second conductivity type to the third well of second conductivity type.