SiC MPS Diode Cell-Stripe Layout for Lower Surge Heating

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Solution Overview

Problem

Silicon Carbide (SiC) Merged PiN Schottky (MPS) diodes exhibit limited surge current capability due to high junction temperature rise during surge events, leading to potential device failure, as existing designs fail to optimize forward voltage drop and heat dissipation effectively.

Innovation Solution

The semiconductor product features a base region with doped stripe and cell regions, where each cell region contacts neighboring stripe regions, enhancing the uniformity of Schottky current distribution and increasing bipolar current flow, thereby improving surge current capability by activating cell regions at lower forward voltage values and using thinner stripe regions to compensate for Schottky area reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional Schottky and P+ implanted areas are used in SiC MPS diodes, then the device can operate at high voltage/current conditions, but the surge current capability is limited due to high junction temperature rise

Engineering Contradiction:
Improvesurge current capabilityVSAvoidjunction temperature
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The device is segmented into multiple discrete P+ implanted regions distributed across the Schottky contact area. Each P+ region acts as an independent current channel, allowing the surge current to be distributed across multiple localized regions rather than concentrated in a single area, thereby reducing peak junction temperature rise during surge events.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The P+ implanted regions are strategically positioned to create localized areas of modified electrical and thermal properties. These regions have different doping concentrations and geometries optimized for surge current handling, while the surrounding Schottky regions maintain low forward voltage drop characteristics, achieving local optimization of both surge capability and efficiency.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the Schottky area is reduced to lower forward voltage drop, then heat generation is reduced, but the current carrying capacity decreases

Engineering Contradiction:
Improveforward voltage dropVSAvoidcurrent carrying capacity
Core Design Contradiction:
Loss of energyVSQuantity of substance

Solution Approach 1:

The invention merges the Schottky barrier region with P+ implanted regions to form a hybrid structure. The Schottky contact provides low forward voltage drop characteristics, while the integrated P+ regions contribute additional current carrying capacity through bipolar conduction mechanisms, achieving a combination of both benefits in a single unified structure.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The device employs a composite structure combining Schottky metal-semiconductor contact with P+ doped semiconductor regions. This composite architecture leverages the complementary electrical characteristics of both structures: the Schottky region contributes to low forward voltage drop while the P+ regions enhance surge current capability through minority carrier injection and bipolar conduction.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly enhances the forward surge current capability of SiC MPS diodes by reducing voltage drop and heat generation, leading to improved reliability and performance during high current pulses.

Implementation Method 1

a metal layer arranged on an upper surface of the base region, such that the metal layer defines a Schottky barrier with the base region

Methodology Applied
Scientific EffectSchottky barrier: Electrical Resistance

Implementation Method 2

A plurality of stripe regions doped with a second conductivity type, provided on an upper surface of the base region, wherein the second conductivity type is different from the first conductivity type

Methodology Applied
Scientific EffectPN junction: Diode

Data Source

PatentEP4243087A1Semiconductor product and method for producing a semiconductor product
Publication Date: 2023.09.13 NEXPERIA BV
  • EP4243087A1 patent drawingFigure 1
  • EP4243087A1 patent drawingFigure 2
  • EP4243087A1 patent drawingFigure 3

AI summary

A semiconductor product, comprising: a base region doped with a first conductivity type; a plurality of stripe regions doped with a second conductivity type, provided on an upper surface of the base region, wherein the second conductivity type is different from the first conductivity type; a plurality of cell regions doped with the second conductivity type, provided on the upper surface of the base region; and a metal layer arranged on the upper surface of the base region, such that the metal layer defines a Schottky barrier with the base region and covers the plurality of stripe regions and the plurality of cell regions; wherein each cell region of a majority of the plurality of cell regions contacts at least one neighbouring stripe region of the plurality of stripe regions.