SiC MPS Junction Layout for Scalable Breakdown Control
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Solution Overview
Problem
Current Merged-PiN-Schottky (MPS) devices face limitations in miniaturization due to lithographic processes, leading to a tradeoff between achievable miniaturization and electrical performance, with a high risk of short circuits between ohmic contacts, which affects their scalability and efficiency.
Innovation Solution
The MPS device design includes a silicon carbide substrate with a drift layer and implanted regions of opposite conductivity, featuring a specific geometry and dopant concentration to enhance breakdown voltage and reduce current leakages, allowing for scalable and efficient operation without short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the MPS device is miniaturized to optimize current concentration and electrical performance, then electrical performance is improved, but the risk of short circuit between ohmic contacts increases
Solution Approach 1:
The patent applies local quality by creating asymmetric implanted regions with different dimensions. The first implanted region has a first dimension and the second implanted region has a second dimension that is greater than the first dimension. This local differentiation allows the device to maintain adequate spacing in critical areas while minimizing overall device area, thus improving electrical performance without increasing short circuit risk.
2Area of moving object
If the junction area of PN diodes is decreased to enable miniaturization, then device area is reduced, but manufacturing precision requirements increase due to lithographic limits
Solution Approach 1:
The patent employs asymmetry by designing implanted regions where the second implanted region has a second dimension greater than the first dimension of the first implanted region. This asymmetric configuration allows the device to achieve miniaturization in one direction while maintaining larger dimensions in another direction where manufacturing precision is more critical, thus reducing the overall device area without excessively increasing manufacturing precision requirements.
3Area of moving object
If the MPS device is scaled excessively to reduce device area, then area is reduced, but the risk of short circuit between ohmic contacts increases
Solution Approach 1:
The patent applies parameter changes by establishing specific dimensional relationships between implanted regions. The second implanted region is configured with a second dimension that is greater than the first dimension of the first implanted region, and the spacing between regions is carefully controlled. These parameter adjustments allow the device to be scaled down in area while maintaining adequate spacing to prevent short circuits, thus reducing device area without compromising reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables optimal use of wafer area, reduces manufacturing costs, and improves electrical performance by minimizing current leakages and maintaining high on-state current flow, while preventing degraded performance due to the ratio of junction-barrier elements and Schottky diodes.
Implementation Method 1
a drift layer of silicon carbide having the first conductivity, extending on the substrate
Implementation Method 2
a breakdown voltage of the MPS device, beyond which a charge carrier multiplication phenomenon occurs
Implementation Method 3
SiC Schottky diodes have demonstrated higher switching performance
Implementation Method 4
The MPS device has at least one Schottky diode and at least one PN diode (i.e., junction and semiconductors) arranged so to be in parallel to each other
Data Source
AI summary
Merged-PiN-Schottky, MPS, device comprising: a substrate of SiC with a first conductivity; a drift layer of SiC with the first conductivity, on the substrate; an implanted region with a second conductivity, extending at a top surface of the drift layer to form a junction-barrier, JB, diode with the substrate; and a first electrical terminal in ohmic contact with the implanted region and in direct contact with the top surface to form a Schottky diode with the drift layer. The JB diode and the Schottky diode are alternated to each other along an axis: the JB diode has a minimum width parallel to the axis with a first value, and the Schottky diode has a maximum width parallel to the axis with a second value smaller than, or equal to, the first value. A breakdown voltage of the MPS device is greater than, or equal to, 115% of a maximum working voltage of the MPS device in an inhibition state.