SiC Epitaxial Wafer Notch Geometry for Accurate Position Reading
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Solution Overview
Problem
Variations in thickness or shape near the notch of a SiC epitaxial wafer can cause failure in accurately reading the notch position during the fabrication of SiC devices, leading to misalignment and defects.
Innovation Solution
A SiC epitaxial wafer design with a notch that has specific side orientations and measurement points, ensuring a film thickness variation of less than 10% between designated points, and a susceptor with a slit to supply purge gas evenly on both sides of the notch, reducing thickness variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If gas is supplied to prevent deposits on the back surface, then deposit formation is reduced, but film thickness variation near the notch increases
Solution Approach 1:
The susceptor is designed with a slit structure that creates localized gas flow patterns. The slit is positioned and dimensioned to supply purge gas specifically to regions where deposits form, while maintaining uniform epitaxial growth conditions across the entire wafer surface. This localized intervention prevents deposits without compromising overall film thickness uniformity.
Solution Approach 2:
The invention optimizes the gas flow parameters by controlling the slit width, depth, and positioning on the susceptor. By adjusting these geometric parameters, the gas flow distribution is controlled to prevent deposit formation while maintaining uniform epitaxial layer thickness across the wafer surface.
2Measurement precision
If the notch is formed for orientation determination, then crystal axis orientation can be controlled, but thickness variation near the notch causes reading failure
Solution Approach 1:
The slit is formed in the susceptor before epitaxial growth to prevent deposit formation that would cause thickness variations. This preliminary structural preparation ensures that when the notch is subsequently formed and gas is supplied during growth, the epitaxial layer maintains uniform thickness near the notch, enabling accurate laser reading.
3Object-generated harmful factors
If purge gas is supplied to prevent deposits, then back surface quality improves, but thickness variation near the notch increases
Solution Approach 1:
The slit structure creates localized gas flow that targets specific regions for deposit prevention while maintaining uniform growth conditions across the wafer. The geometry of the slit is designed to control gas distribution, ensuring that purge gas is supplied where needed without causing thickness variations near the notch.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves high uniformity in the SiC epitaxial layer thickness near the notch, enabling precise control of position and orientation, reducing defects in SiC devices and ensuring accurate notch reading.
Implementation Method 1
supplying gas to a back surface of the SiC substrate in order to prevent deposits from adhering to the back surface of the SiC substrate
Implementation Method 2
a method for manufacturing a SiC epitaxial wafer by epitaxially growing a SiC epitaxial layer on a SiC substrate
Data Source
AI summary
The SiC epitaxial wafer has a notch. The notch has a first side and a second side that connect the innermost point of the notch and an outer circumference of the wafer. The first side is in a [−1−120] direction from the innermost point, and the second side is in a [11−20] direction from the innermost point. A position of 0.5 mm from a middle point of the first side in a [−1100] direction is set as a first measurement point, and a position of 0.5 mm from a middle point of the second side in the [−1100] direction is set as a second measurement point. A film thickness variation at the first measurement point and the second measurement point of the SiC epitaxial layer of the SiC epitaxial wafer is less than 10%.