SiC Ohmic Electrode Silicide Thickness Control

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Solution Overview

Problem

Conventional silicon carbide semiconductor devices face challenges in forming ohmic electrodes with uniform thickness and improved adhesion, particularly due to variations in the polished state of the substrate surface, leading to issues with the silicide layer's thickness and surface roughness, which affect the reliability and performance of power semiconductor modules, especially under high-temperature conditions.

Innovation Solution

A silicon carbide semiconductor device with an ohmic electrode comprising nickel silicide and molybdenum carbide or titanium carbide, where the silicide thickness varies between regions, and a protective film of titanium, titanium nitride, or tantalum is applied, with a back surface roughness polished to 2 nm to 10 nm to facilitate laser annealing and improve adhesion, and the laser annealing process is optimized to achieve a silicide layer with a specific ratio of thin to thick regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the back surface of the silicon carbide semiconductor substrate is polished to reduce surface roughness, then the adhesion of the silicide layer is improved, but the manufacturing complexity and time increase

Engineering Contradiction:
Improveadhesion of silicide layerVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The back surface of the silicon carbide semiconductor substrate is polished in advance to a specified roughness range (2 nm to 10 nm) before forming the silicide layer. This preliminary surface preparation ensures optimal adhesion conditions are established beforehand, eliminating the need for additional surface treatment steps later in the process and reducing overall manufacturing complexity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the surface roughness is increased to improve silicide layer formation, then the adhesion is enhanced, but the manufacturing precision decreases

Engineering Contradiction:
Improveadhesion of silicide layerVSAvoidsurface roughness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent specifies a precise surface roughness range (2 nm to 10 nm) that optimizes both adhesion and manufacturing feasibility. This controlled parameter range ensures sufficient surface area for silicide formation and strong adhesion while remaining achievable through standard polishing processes, thus maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the adhesion between the ohmic electrode and protective films, improving the resistance and long-term reliability of the semiconductor device, suitable for high-temperature applications in power semiconductor modules.

Implementation Method 1

a back surface roughness polished to 2 nm to 10 nm

Methodology Applied
Scientific EffectPolishing: Abrasion

Implementation Method 2

laser annealing treatment after sequentially depositing the molybdenum and the nickel, or the titanium and the nickel

Methodology Applied
Scientific EffectLaser annealing: Laser

Implementation Method 3

sequentially depositing on the back surface of the semiconductor substrate after polishing, molybdenum and nickel, or titanium and nickel

Methodology Applied
Scientific EffectSequential deposition: Physical Vapour Deposition

Data Source

PatentUS11469303B2Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
Publication Date: 2022.10.11 FUJI ELECTRIC CO LTD
  • US11469303B2 patent drawing
  • US11469303B2 patent drawing
  • US11469303B2 patent drawing

AI summary

A semiconductor device includes a semiconductor device provided on a semiconductor substrate and an ohmic electrode provided on a back surface of the semiconductor device and containing a nickel silicide and a molybdenum carbide, or the nickel silicide and a titanium carbide. The ohmic electrode is configured by first regions where a silicide is thick and second regions where the silicide is thin; a ratio of an arithmetic area of the second regions to an arithmetic area of the ohmic electrode is in a range from 10% to 30% in a plan view.