SiC Surface Electrode Structure for Pad Area and Discharge Isolation

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Solution Overview

Problem

Conventional semiconductor devices face challenges in maintaining a high discharge starting voltage during electric characteristic measurements, leading to potential discharge issues between the dicing region and surface electrode, which limits the pad area and number of chips that can be obtained from a wafer.

Innovation Solution

A semiconductor device with a conductive-type SiC layer, a voltage relaxing layer, and an insulating layer is designed, where the voltage relaxing layer is exposed at the end portion of the SiC layer and covered by the insulating layer, allowing the surface electrode to be connected through the insulating layer with a selectively exposed pad area. This configuration eases the voltage burden on the atmosphere by dividing the applied voltage across multiple layers, enabling a lower discharge starting voltage and a wider pad area or increased chip density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the pad area is widened to improve electrical connection, then the discharge starting voltage decreases due to reduced distance to dicing region

Engineering Contradiction:
Improvepad areaVSAvoiddischarge starting voltage
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

An insulating layer is introduced as an intermediary between the surface electrode (including pad area) and the dicing region. This insulating layer prevents direct discharge paths while allowing the pad area to be widened for improved electrical connection, thus resolving the contradiction between pad area size and discharge starting voltage maintenance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution moves from a two-dimensional planar separation (relying only on atmospheric distance) to a three-dimensional structure by adding the insulating layer vertically. This allows the pad area to extend closer to the dicing region in the horizontal plane while the insulating layer provides vertical isolation, maintaining high discharge starting voltage despite increased horizontal proximity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the dicing region width is reduced to increase chip density, then the discharge path distance decreases leading to lower discharge starting voltage

Engineering Contradiction:
Improvechip densityVSAvoiddischarge starting voltage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The insulating layer acts as a mediator that enables reduced dicing region width for increased chip density while preventing discharge. The insulating layer provides the necessary electrical isolation, allowing the dicing region to be narrower without compromising discharge starting voltage

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure is segmented into distinct functional layers: the dicing region for mechanical separation, the insulating layer for electrical isolation, and the surface electrode region for electrical connection. This segmentation allows each element to be optimized independently - narrow dicing for density, sufficient insulating layer for discharge prevention

Inventive Principle:
Principle #1Segmentation

3Reliability

If atmospheric distance between surface electrode and dicing region is increased to prevent discharge, then the pad area must be reduced

Engineering Contradiction:
Improvedischarge starting voltageVSAvoidpad area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The solution transitions from relying solely on horizontal atmospheric distance to utilizing vertical insulation through the insulating layer. This dimensional change allows the pad area to be large in the horizontal plane while the insulating layer provides the necessary electrical isolation in the vertical direction, eliminating the trade-off between pad area and discharge prevention

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents discharge between the dicing region and surface electrode, allowing for a wider pad area or increased chip density without compromising the discharge starting voltage, thereby improving the measurement and manufacturing efficiency of semiconductor devices.

Implementation Method 1

forming an insulating layer on the SiC wafer so as to cover the voltage relaxing layer

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

forming a second conductive-type voltage relaxing layer with a width wider than that of the dicing region

Methodology Applied
Scientific EffectVoltage relaxation: Electrical Resistance

Implementation Method 3

the discharge starting voltage V is a voltage when an insulator such as the atmosphere present between the dicing region and the surface electrode is broken down and an electric current starts to flow

Methodology Applied
Scientific EffectElectrical breakdown of insulator: Townsend Discharge

Data Source

PatentUS11862672B2Semiconductor device, and method for manufacturing semiconductor device
Publication Date: 2024.01.02 ROHM CO LTD
  • US11862672B2 patent drawing
  • US11862672B2 patent drawing
  • US11862672B2 patent drawing

AI summary

[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.