SiC Pad Layout and Contact Hole Structure for Surge Breakdown Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Silicon carbide semiconductor devices face electric field concentration in interlayer insulating films, leading to potential dielectric breakdown during surges.
Innovation Solution
The design includes a silicon carbide semiconductor device with specific region configurations and contact hole dimensions to reduce contact resistance and alleviate electric field concentration, featuring contiguous semiconductor regions and strategically positioned gate and source runners to distribute voltage evenly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional interlayer insulating film structure is used, then device fabrication is simple, but electric field concentration occurs leading to dielectric breakdown during surges
Solution Approach 1:
The patent applies local quality by creating different contact hole dimensions at different locations. Specifically, the contact hole in the extension region of the gate pad has a larger opening area than contact holes in other regions. This localized structural variation redistributes the electric field concentration specifically at the vulnerable gate pad area without complicating the entire device structure, thereby improving reliability against dielectric breakdown during surges.
2Reliability
If contact hole size is increased to reduce contact resistance, then electrical connection improves, but electric field concentration in interlayer insulating film increases
Solution Approach 1:
The patent implements local quality by strategically increasing the contact hole opening area only in the extension region of the gate pad, while maintaining smaller contact hole dimensions in other regions. This localized enlargement reduces contact resistance specifically where electrical connection is most critical (at the gate pad extension), while avoiding excessive electric field concentration in the broader interlayer insulating film structure.
Data Source
AI summary
A silicon carbide semiconductor device includes a silicon carbide substrate having a first principal surface; an interlayer insulating film; and a gate pad and a source pad provided on the film. The silicon carbide substrate includes a first region including unit cells; a second region overlapping the gate pad; and a third region. Each unit cell includes a drift region; a body region; a source region; a contact region; a gate electrode; and a gate insulating film. The second region includes a first semiconductor region. The third region includes a second semiconductor region. The first semiconductor region and the second semiconductor region are contiguous. In the interlayer insulation film, first and second contact holes are formed. The source pad is electrically connected to the source region and the contact region, electrically connected to the second semiconductor region.