Hydrogen-Free Passivation for SiC Devices
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Solution Overview
Problem
Conventional passivation layers in semiconductor devices, particularly those using silicon nitride and oxide, suffer from high hydrogen content which leads to reduced surface mobility, carrier traps, and increased forward voltage due to hydrogen migration, degrading device performance.
Innovation Solution
A two-part passivation structure is implemented, where a sputtered non-stoichiometric silicon nitride layer is deposited on a thermal oxide layer, followed by a stoichiometric silicon nitride layer deposited via chemical vapor deposition, both of which are substantially hydrogen-free, to enhance electronic properties and provide an effective environmental barrier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional CVD silicon nitride is used for passivation, then environmental barrier properties are improved, but hydrogen content increases causing interface degradation and device performance reduction
Solution Approach 1:
The passivation structure is segmented into three distinct layers: thermal oxide layer (first layer), sputtered silicon nitride layer (second layer), and CVD silicon nitride layer (third layer). Each layer serves specific functions - the thermal oxide provides a stable base interface, the sputtered nitride provides hydrogen-free passivation, and the CVD nitride provides environmental barrier while being separated from the semiconductor substrate by the hydrogen-free intermediate layer.
Solution Approach 2:
The sputtered silicon nitride layer acts as an intermediary layer between the thermal oxide and the CVD silicon nitride layer. This intermediate layer prevents hydrogen from the CVD process from reaching the semiconductor substrate interface, while still allowing the CVD layer to provide its environmental barrier function.
2Reliability
If PECVD silicon nitride is used for passivation, then film density and environmental sealing are improved, but hydrogen diffusion into semiconductor layers occurs causing contact degradation
Solution Approach 1:
The sputtered silicon nitride layer is deposited beforehand to create a hydrogen-free barrier between the semiconductor substrate and the subsequent CVD process. This preliminary action prevents hydrogen from diffusing into the semiconductor layers during and after CVD deposition.
Solution Approach 2:
Different regions of the passivation structure have different compositions and properties optimized for their specific functions. The thermal oxide layer provides interface stability, the sputtered nitride provides hydrogen-free passivation with specific stoichiometry, and the CVD nitride provides dense environmental sealing. Each layer's local properties are tailored to its role in the overall structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces parasitic capacitance, minimizes device trapping, and improves the hydrogen barrier properties, leading to enhanced device performance by maintaining ideal ohmic contacts and reducing the impact of hydrogen on the interface, thereby improving the overall reliability and efficiency of semiconductor devices.
Implementation Method 1
a sputtered non-stoichiometric silicon nitride layer is deposited on a thermal oxide layer
Implementation Method 2
a stoichiometric silicon nitride layer deposited via chemical vapor deposition
Implementation Method 3
a sputtered non-stoichiometric silicon nitride layer is deposited on a thermal oxide layer
Data Source
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Figure 5
AI summary
A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.